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ARM: dts: imx6ull-colibri: enable UHS-I for USDHC1
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Allows to use the SD interface at a higher speed mode if the card
supports it. For this the signaling voltage is switched from 3.3V to
1.8V under the usdhc1's drivers control.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Igor Opaniuk authored and Shawn Guo committed Jun 12, 2019
1 parent d7bfba7 commit 2035314
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Showing 3 changed files with 19 additions and 2 deletions.
4 changes: 4 additions & 0 deletions arch/arm/boot/dts/imx6ul.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -857,6 +857,8 @@
<&clks IMX6UL_CLK_USDHC1>,
<&clks IMX6UL_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-step= <2>;
fsl,tuning-start-tap = <20>;
bus-width = <4>;
status = "disabled";
};
Expand All @@ -870,6 +872,8 @@
<&clks IMX6UL_CLK_USDHC2>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step= <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};

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11 changes: 9 additions & 2 deletions arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -145,13 +145,20 @@
};

&usdhc1 {
pinctrl-names = "default";
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>;
no-1-8-v;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>;
pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
disable-wp;
wakeup-source;
keep-power-in-suspend;
vmmc-supply = <&reg_3v3>;
vqmmc-supply = <&reg_sd1_vmmc>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
6 changes: 6 additions & 0 deletions arch/arm/boot/dts/imx6ull-colibri.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -545,6 +545,12 @@
>;
};

pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0
>;
};

pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
fsl,pins = <
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14
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