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DC sensitivity analysis: fix contingency involving phase tap changer #237

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merged 17 commits into from
Mar 9, 2021

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Djazouli
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@Djazouli Djazouli commented Mar 3, 2021

Please check if the PR fulfills these requirements (please use '[x]' to check the checkboxes, or submit the PR and then click the checkboxes)

  • The commit message follows our guidelines
  • Tests for the changes have been added (for bug fixes / features)
  • [] Docs have been added / updated (for bug fixes / features)

@Djazouli Djazouli mentioned this pull request Mar 3, 2021
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flo-dup and others added 8 commits March 4, 2021 16:59
Signed-off-by: Florian Dupuy <florian.dupuy@rte-france.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Florian Dupuy <florian.dupuy@rte-france.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Florian Dupuy <florian.dupuy@rte-france.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Florian Dupuy <florian.dupuy@rte-france.com>
Signed-off-by: Florian Dupuy <florian.dupuy@rte-france.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Florian Dupuy <florian.dupuy@rte-france.com>
Signed-off-by: Florian Dupuy <florian.dupuy@rte-france.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Djazouli added 3 commits March 4, 2021 19:13
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
@Djazouli Djazouli force-pushed the fix_contingency_on_transformer_dc branch from 4530fd3 to 5454e66 Compare March 4, 2021 18:19
@@ -109,6 +107,15 @@ public DcLoadFlowResult run() {
.forEach(column -> targetVector[column] = 0);
}

if (!removedBranches.isEmpty()) {
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Can you fix the comment just above and add a comment here to explain maybe.

annetill added 2 commits March 5, 2021 12:34
Signed-off-by: Anne Tilloy <anne.tilloy@rte-france.com>
Signed-off-by: Anne Tilloy <anne.tilloy@rte-france.com>
Base automatically changed from refactor_dcsa to master March 8, 2021 12:10
annetill and others added 4 commits March 8, 2021 14:52
Signed-off-by: Anne Tilloy <anne.tilloy@rte-france.com>
…transformer_dc_partial_merge

# Conflicts:
#	src/main/java/com/powsybl/openloadflow/dc/DcLoadFlowEngine.java
#	src/main/java/com/powsybl/openloadflow/graph/EvenShiloachGraphDecrementalConnectivity.java
#	src/main/java/com/powsybl/openloadflow/graph/MinimumSpanningTreeGraphDecrementalConnectivity.java
#	src/main/java/com/powsybl/openloadflow/graph/NaiveGraphDecrementalConnectivity.java
#	src/main/java/com/powsybl/openloadflow/sensi/AbstractSensitivityAnalysis.java
#	src/main/java/com/powsybl/openloadflow/sensi/DcSensitivityAnalysis.java
…ix_contingency_on_transformer_dc

Signed-off-by: Gael Macherel <gael.macherel@artelys.com>
Signed-off-by: Anne Tilloy <anne.tilloy@rte-france.com>
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sonarqubecloud bot commented Mar 9, 2021

Kudos, SonarCloud Quality Gate passed!

Bug A 0 Bugs
Vulnerability A 0 Vulnerabilities
Security Hotspot A 0 Security Hotspots
Code Smell A 2 Code Smells

100.0% 100.0% Coverage
0.0% 0.0% Duplication

@annetill annetill changed the title Fix contingency on transformer dc DC sensitivity analysis: fix contingency involving phase tap changer Mar 9, 2021
@annetill annetill merged commit a54059d into master Mar 9, 2021
@annetill annetill deleted the fix_contingency_on_transformer_dc branch March 9, 2021 08:34
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3 participants