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ESP SoC Reset sequences #2164

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ESP SoC Reset sequences #2164

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MabezDev
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@MabezDev MabezDev commented Feb 9, 2024

Builds on top of #2151
Supercededes #1965
Closes #1963.

I still notice some oddities, where the probe/dtm becomes unresponsive, particularly after flashing once. I usually then need to physically unplug the board and replug for flashing to work again. Not sure what's causing that atm, but this PR should still bring us a step closer.

Draft until all chips are supported.

@bugadani
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bugadani commented Feb 9, 2024

Better, but still not quite right: this PR only works once per power cycle, just as OP said. However, for me pressing Rst works, too, no need to unplug.

❯ probe-rs run --chip esp32c3 target\riscv32imc-esp-espidf\debug\c3-idf-demo
      Erasing ✔ [00:00:02] [############################] 576.00 KiB/576.00 KiB @ 261.30 KiB/s (eta 0s )
  Programming ✔ [00:00:04] [#############################] 249.81 KiB/249.81 KiB @ 58.07 KiB/s (eta 0s )
    Finished in 6.735s
 WARN probe_rs::util::rtt: No RTT header info was present in the ELF file. Does your firmware run RTT?


❯ probe-rs run --chip esp32c3 target\riscv32imc-esp-espidf\debug\c3-idf-demo
 WARN probe_rs::session: Could not clear all hardware breakpoints: A RISC-V specific error occurred.

Caused by:
    Timeout during DMI access.
 WARN probe_rs::session: Failed to deconfigure device during shutdown: A RISC-V specific error occurred.

Caused by:
    Timeout during DMI access.
Error: Connecting to the chip was unsuccessful.

Caused by:
    0: A RISC-V specific error occurred.
    1: Timeout during DMI access.

DebugSequence::Arm(_) => panic!("There are no ARM ESP targets."),
};
let flash_size_result = session.halted_access(|sess| {
// Figure out flash size from the memory map. We need a different bootloader for each size.
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@bugadani bugadani Feb 9, 2024

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Please keep bugging me to work on this, these need to be custom flash algo functions and not sequences.

Also I don't think we need the clone here any more, but I'm not 100% sure.

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So I have found the issue, and a work around, but it's not clear to me if we can do better.

The IDF application re-enables watchdogs during its application, when you Ctl+C, the application halts (stop petting the wdg) and the board resets after some period. It's possible to begin reflashing before the wdg reset if you're fast enough and reflashing works perfectly.

The workaround is to pass --catch-reset which will leave the core in a halted state on wdg reset, but this is just a workaround. Probe-rs doesn't seem to be able to coax the DTM out of whatever state it's in when the wdg resets the chip and the DTM thinks the core should be halted, its like the chip and DTM get out of sync. Not sure what I can try here to improve that, any ideas?

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Failed to verify flash algorithm on esp32c3 with esp-idf std telf file.
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