MAGIA v2

.gitignore

@@ -8,3 +8,5 @@ synth-ips.log
 build-hw.log
 profile-ips.log
 magia_venv/
+modelsim.ini
+# sw/tests/*/

Bender.local

@@ -1,9 +1,10 @@
 overrides:
   fpnew              : { git: "https://github.com/pulp-platform/cvfpu.git"             , rev: a8e0cba6dd50f357ece73c2c955d96efc3c6c315 }
   hci                : { git: "https://github.com/pulp-platform/hci.git"               , rev: 5a48a854573fca5bbabc1cfd4110fa4530a50ed7 }
-  cv32e40p           : { git: "https://github.com/pulp-platform/cv32e40p.git"          , rev: 1a93f340e9dadb9f7c8c471f27a40932c8b1c62e }
+  cv32e40p           : { git: "https://github.com/pulp-platform/cv32e40p.git"          , rev: 37a82d337ba60129c333d104c29e816d0698b53b }
   cv32e40x           : { git: "https://github.com/pulp-platform/cv32e40x.git"          , rev: a90101211048ba1a16cedbe4db963ab6e12569d7 }
   axi                : { git: "https://github.com/pulp-platform/axi.git"               , version: 0.39.5                               }
+  obi                : { git: "https://github.com/pulp-platform/obi.git"               , rev: 528dc65303d5ffb02fbc254324c6b53eac0dd6e5 }
   register_interface : { git: "https://github.com/pulp-platform/register_interface.git", rev: e25b36670ff7aab3402f40efcc2b11ee0f31cf19 }
   idma               : { git: "https://github.com/pulp-platform/iDMA.git"              , rev: c12caf59bb482fe44b27361f6924ad346b2d22fe }
   tech_cells_generic : { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13                               }

Bender.yml

@@ -13,32 +13,36 @@
 # limitations under the License.
 #
 # Author: Victor Isachi <victor.isachi@unibo.it>
+#         Luca Balboni <luca.balboni10@studio.unibo.it>
 #
 # Bender manifest
 
 package:
   name: magia
   authors:
     - "Victor Isachi (victor.isachi@unibo.it)"
+    - "Luca Balboni (luca.balboni10@studio.unibo.it)"
 
 dependencies:
   redmule           : { git: "https://github.com/pulp-platform/redmule.git"           , rev: 9a1aa14be0b23f0ade84bab57e7e434397ac9876 } # branch: vi/scale_up
   cv32e40x          : { git: "https://github.com/pulp-platform/cv32e40x.git"          , rev: a90101211048ba1a16cedbe4db963ab6e12569d7 } # branch: vi/redmule_scaleup
+  cv32e40p          : { git: "https://github.com/pulp-platform/cv32e40p.git"          , rev: 37a82d337ba60129c333d104c29e816d0698b53b } 
   idma              : { git: "https://github.com/pulp-platform/iDMA.git"              , rev: a6b190c7991331432afa9a2899d032bc1b176830 } # branch: vi/redmule_scaleup
   hwpe-stream       : { git: "https://github.com/pulp-platform/hwpe-stream.git"       , version: 1.6                                  }
   hwpe-ctrl         : { git: "https://github.com/pulp-platform/hwpe-ctrl.git"         , rev: c35d5b0886ab549fb9144c3c14a4682112330e21 } # branch: yt/reqrsp
   hci               : { git: "https://github.com/pulp-platform/hci.git"               , rev: 5a48a854573fca5bbabc1cfd4110fa4530a50ed7 } # branch: vi/redmule_scaleup
   cluster_icache    : { git: "https://github.com/pulp-platform/cluster_icache.git"    , rev: 917ecbf908bdaa22c5713bbcff277d142506bb16 } # branch: michaero/astral
   fpnew             : { git: "https://github.com/pulp-platform/cvfpu.git"             , rev: "pulp-v0.1.3"                            }
   fpu_ss            : { git: "https://github.com/pulp-platform/fpu_ss.git"            , rev: 8e2eff774d9d38a1e17a46bd56a0936dac9522f0 } # branch: vi/bender_manifest
-  obi               : { git: "https://github.com/pulp-platform/obi.git"               , version: 0.1.6                                }
+  obi               : { git: "https://github.com/pulp-platform/obi.git"               , rev: 528dc65303d5ffb02fbc254324c6b53eac0dd6e5 } # branch: lb/fix_atop_resolver                       
   axi               : { git: "https://github.com/pulp-platform/axi.git"               , version: 0.39.5                               }
   register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.4.4                                }
-  safety_island     : { git: "https://github.com/pulp-platform/safety_island.git"     , rev: 2273db6c780ab7c582feaf0c9645ad644c35aa11 } # branch: vi/redmule_scaleup
+  axi_obi           : { git: "https://github.com/pulp-platform/axi_obi.git"           , rev: 3f29bd67369a093cf5be4ea3fdac3c6c216424cc } # branch: vi/magia
   common_cells      : { git: "https://github.com/pulp-platform/common_cells.git"      , version: 1.21.0                               }
   tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.11                               }
   fractal_sync      : { git: "https://github.com/VictorIsachi/fractal_sync"           , rev: fdb619f40f99d769cfceb20ac2117ff8d99e98a3 } # branch: main
   floo_noc          : { git: "https://github.com/pulp-platform/FlooNoC.git"           , rev: f4a36265cda8b56faee45692afb20ddfffba6dee } # branch: main
+  event_unit_flex   : { git: "https://github.com/pulp-platform/event_unit_flex.git"   , rev: 763c3b9977970f656326c70a96debfb2ac0f85b2 } 
 
 export_include_dirs:
   - hw/include
@@ -64,13 +68,21 @@ sources:
       - hw/tile/converters/obi2hci.sv
       - hw/tile/converters/hci2obi.sv
       - hw/tile/converters/xif_if2struct.sv
+      - hw/tile/converters/obi2hwpe_ctrl.sv
+      - hw/tile/xbar_periph_bus_if.sv
+      - hw/tile/cluster_event_map.sv
+      - hw/tile/magia_event_unit.sv
       - hw/tile/obi_demux_addr.sv
       - hw/tile/l1_spm.sv
-      - hw/tile/idma_xif_inst_decoder.sv
       - hw/tile/xif_inst_dispatcher.sv
-      - hw/tile/idma_axi_obi_transfer_ch.sv
+      - hw/tile/idma_xif_inst_decoder.sv
       - hw/tile/idma_ctrl.sv
+      - hw/tile/idma_axi_obi_transfer_ch.sv
+      - hw/tile/idma_obi_ctrl_decoder.sv
+      - hw/tile/idma_ctrl_mm.sv
       - hw/tile/fractal_sync_xif_inst_decoder.sv
+      - hw/tile/obi_slave_fsync.sv
+      - hw/tile/core_data_demux_eu_direct.sv
       - hw/tile/magia_tile.sv
       # MAGIA DV
       - target/sim/src/tile/magia_tile_tb_pkg.sv
@@ -79,7 +91,8 @@ sources:
       - target/sim/src/tile/magia_tile_vip.sv
       - target/sim/src/tile/magia_tile_fixture.sv
       - target/sim/src/tile/magia_tile_tb.sv
-  # MAGIA
+      # MAGIA
+
   - target: all(magia_dv, not(standalone_tile))
     defines:
       CORE_TRACES: ~
@@ -104,13 +117,21 @@ sources:
       - hw/tile/converters/obi2hci.sv
       - hw/tile/converters/hci2obi.sv
       - hw/tile/converters/xif_if2struct.sv
+      - hw/tile/converters/obi2hwpe_ctrl.sv
+      - hw/tile/xbar_periph_bus_if.sv
+      - hw/tile/cluster_event_map.sv
+      - hw/tile/magia_event_unit.sv
       - hw/tile/obi_demux_addr.sv
       - hw/tile/l1_spm.sv
-      - hw/tile/idma_xif_inst_decoder.sv
       - hw/tile/xif_inst_dispatcher.sv
-      - hw/tile/idma_axi_obi_transfer_ch.sv
+      - hw/tile/idma_xif_inst_decoder.sv
       - hw/tile/idma_ctrl.sv
+      - hw/tile/idma_axi_obi_transfer_ch.sv
+      - hw/tile/idma_obi_ctrl_decoder.sv
+      - hw/tile/idma_ctrl_mm.sv
       - hw/tile/fractal_sync_xif_inst_decoder.sv
+      - hw/tile/obi_slave_fsync.sv
+      - hw/tile/core_data_demux_eu_direct.sv
       - hw/tile/magia_tile.sv
       # MAGIA
       - hw/mesh/magia.sv
@@ -144,13 +165,21 @@ sources:
       - hw/tile/converters/obi2hci.sv
       - hw/tile/converters/hci2obi.sv
       - hw/tile/converters/xif_if2struct.sv
+      - hw/tile/converters/obi2hwpe_ctrl.sv
+      - hw/tile/xbar_periph_bus_if.sv
+      - hw/tile/cluster_event_map.sv
+      - hw/tile/magia_event_unit.sv
       - hw/tile/obi_demux_addr.sv
       - hw/tile/l1_spm.sv
-      - hw/tile/idma_xif_inst_decoder.sv
       - hw/tile/xif_inst_dispatcher.sv
-      - hw/tile/idma_axi_obi_transfer_ch.sv
+      - hw/tile/idma_xif_inst_decoder.sv
       - hw/tile/idma_ctrl.sv
+      - hw/tile/idma_axi_obi_transfer_ch.sv
+      - hw/tile/idma_obi_ctrl_decoder.sv
+      - hw/tile/idma_ctrl_mm.sv
       - hw/tile/fractal_sync_xif_inst_decoder.sv
+      - hw/tile/obi_slave_fsync.sv
+      - hw/tile/core_data_demux_eu_direct.sv
       - hw/tile/magia_tile.sv
       # MAGIA
       - hw/mesh/noc/floo_axi_mesh_2x2_noc.sv

Makefile

@@ -20,7 +20,11 @@
 
 
 # Paths to folders
+ROOT_DIR       := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+core           ?= CV32E40X
+
 MAGIA_DIR  ?= $(shell pwd)
+
 SW             ?= sw
 BUILD_DIR      ?= sim/work
 ifneq (,$(wildcard /etc/iis.version))
@@ -34,7 +38,11 @@ BENDER_DIR     ?= .
 ISA            ?= riscv
 ARCH           ?= rv
 XLEN           ?= 32
-XTEN           ?= imafc
+ifeq ($(core), CV32E40X)
+  XTEN         = imafc
+else
+  XTEN         = imfcxpulpv2
+endif
 ABI            ?= ilp
 XABI           ?= f
 
@@ -86,6 +94,10 @@ ifeq ($(debug),1)
 	FLAGS += -DDEBUG
 endif
 
+ifeq ($(core), CV32E40X)
+  FLAGS += -DCV32E40X
+endif
+
 # Include directories
 INC += -Isw
 INC += -Isw/inc
@@ -118,8 +130,8 @@ $(STIM_INSTR) $(STIM_DATA): $(BIN)
 	scripts/parse_s19.pl $(BIN).s19 > $(BIN).txt &&					\
 	python scripts/s19tomem.py $(BIN).txt $(STIM_INSTR) $(STIM_DATA)
 	cd $(TEST_DIR)/$(test) &&										\
-	ln -sfn ../../../$(INI_PATH) $(VSIM_INI) &&						\
-	ln -sfn ../../../$(WORK_PATH) $(VSIM_LIBS)
+	ln -sfn $(ROOT_DIR)/$(INI_PATH) $(VSIM_INI) &&						\
+	ln -sfn $(ROOT_DIR)/$(WORK_PATH) $(VSIM_LIBS)
 
 $(BIN): $(CRT) $(OBJ)
 	$(LD) $(LD_OPTS) -o $(BIN) $(CRT) $(OBJ) -T$(LINKSCRIPT)
@@ -203,11 +215,23 @@ include bender_sim.mk
 include bender_synth.mk
 include bender_profile.mk
 
-bender_defs += -D COREV_ASSERT_OFF
+ifeq ($(core), CV32E40X)
+  bender_defs += -D COREV_ASSERT_OFF
+endif
+
+ifeq ($(core), CV32E40X)
+  bender_defs += -D CV32E40X
+else ifeq ($(core), CV32E40P)
+  bender_defs += -D CV32E40P
+else
+  $(error Detected unsupported core, must choose among CV32E40X and CV32E40P)
+endif
 
 bender_targs += -t rtl
 bender_targs += -t test
-bender_targs += -t cv32e40p_exclude_tracer
+bender_targs += -t cv32e40p_include_tracer
+
+
 # Targets needed to avoid error even though the module is not used
 bender_targs += -t snitch_cluster
 bender_targs += -t idma_test
@@ -227,9 +251,13 @@ ifeq ($(mesh_dv),1)
 else
 	tb         := magia_tile_tb
 endif
-WAVES        := ./wave.do
-bender_targs += -t redmule_complex
-bender_targs += -t cv32e40x_bhv
+WAVES        := $(mkfile_path)/wave.do
+ifeq ($(core), CV32E40X)
+  bender_targs += -t redmule_complex
+  bender_targs += -t cv32e40x_bhv
+else
+  bender_targs += -t redmule_hwpe
+endif
 
 update-ips:
 	$(BENDER) update

README.md

@@ -24,6 +24,8 @@ By default, the `python` in your `$PATH` is used. You can specify the version by
 
 The following *optional* parameters can be specified:
 
+`core`: **CV32E40X**|**CV32E40P** (**Default**: CV32E40X). Selects between the cv32e40x core with Xif programming interface and cv32e40p with memory mapped interface.
+
 `mesh_dv`: **0**|**1** (**Default**: 1). 0 simulation of a single tile; 1 simulation of the entire mesh.
 
 `fast_sim`: **0**|**1** (**Default**: 0). 0 faster simulation that does not track signals; 1 simulation that tracks signals (for debugging).
@@ -36,7 +38,7 @@ The following *optional* parameters can be specified:
 
 **1)** Setup the *environment* (`MAGIA` folder):
 ```bash
-source setup_env.sh
+source setup_env.sh <core>
 ```
 **2)** Install *python dependencies* (`MAGIA` folder):
 ```bash
@@ -48,35 +50,35 @@ make bender
 ```
 **4)** Clone the *dependencies* and generate the *compilation script* (`MAGIA` folder):
 ```bash
-make update-ips > update-ips.log <mesh_dv>
+make update-ips > update-ips.log <core> <mesh_dv>
 ```
 **4\*)** Apply FlooNoC *patch* - **currently FlooNoC requires this step but should not need it in the future** (`MAGIA` folder):
 ```bash
 make floonoc-patch
 ```
 **5)** *Build* the hardware (`MAGIA` folder):
 ```bash
-make build-hw > build-hw.log <mesh_dv> <fast_sim>
+make build-hw > build-hw.log <core> <mesh_dv> <fast_sim>
 ```
 **6)** *Compile* the test code (`MAGIA` folder):
 ```bash
-make all <test>
+make all <test> <core>
 ```
 **7)** *Run* test (`MAGIA` folder):
 ```bash
-make run <test> <gui> <mesh_dv>
+make run <test> <core> <gui> <mesh_dv>
 ```
 
 **Full example**:
 ```bash
 make python_venv
-source setup_env.sh
+source setup_env.sh CV32E40P
 make python_deps
 make bender
-make update-ips > update-ips.log
-make build-hw > build-hw.log fast_sim=1
-make all test=fsync_test
-make run test=fsync_test
+make update-ips > update-ips.log core=CV32E40P
+make build-hw > build-hw.log core=CV32E40P fast_sim=1
+make all test=fsync_test core=CV32E40P
+make run test=fsync_test core=CV32E40P
 ```
 
 ## ⚙️ Architecture

bender_common.mk

@@ -22,6 +22,12 @@ common_targs += -t cv32e40p_exclude_tracer
 #	common_targs += -t redmule_hwpe
 #endif
 
+ifeq ($(core), CV32E40X)
+	sim_targs += -t cv32e40x
+else ifeq ($(core), CV32E40P)
+	sim_targs += -t cv32e40p
+endif
+
 common_targs += -t magia_tile
 
-common_defs  += -D COREV_ASSERT_OFF
+common_defs  += -D COREV_ASSERT_OFF

hw/mesh/magia.sv

@@ -225,8 +225,11 @@ module magia
         .wu_wfe_i
       );
   `ifdef CORE_TRACES
+  `ifdef CV32E40X
       localparam string core_trace_file_name = $sformatf("%s%0d", "log_file_", i*N_TILES_X+j);
       defparam i_magia_tile.i_cv32e40x_core.rvfi_i.tracer_i.LOGFILE_PATH_PLUSARG = core_trace_file_name;
+  `endif
+  // Note: cv32e40p tracer generates its own filename: trace_core_{cluster_id}_{core_id}.log
   `endif
 
       if (i == 0) begin

hw/tile/cluster_event_map.sv

@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2023-2024 ETH Zurich and University of Bologna
+ *
+ * Licensed under the Solderpad Hardware License, Version 0.51 
+ * (the "License"); you may not use this file except in compliance 
+ * with the License. You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ * SPDX-License-Identifier: SHL-0.51
+ *
+ * Authors: Luca Balboni <luca.balboni10@studio.unibo.it>
+ *
+ * Simple cluster event mapping module for MAGIA project
+ * This module maps various event types to the final cluster event outputs
+*/
+
+module cluster_event_map #(
+  parameter int unsigned NB_CORES = 1
+)(
+  // Input events from various sources
+  input  logic [NB_CORES-1:0] [7:0] sw_events_i,         // Software events
+  input  logic [NB_CORES-1:0]       barrier_events_i,    // Barrier events (reduced)
+  input  logic [NB_CORES-1:0]       mutex_events_i,      // Mutex events (reduced)
+  input  logic [NB_CORES-1:0]       dispatch_events_i,   // Dispatch events
+  input  logic                      periph_fifo_event_i, // Peripheral FIFO event
+
+  // Hardware events from accelerators, DMA, timers, etc.
+  input  logic [NB_CORES-1:0] [3:0] acc_events_i,        // Accelerator events (4 bits per core)
+  input  logic [NB_CORES-1:0] [1:0] dma_events_i,        // DMA events (2 bits per core)
+  input  logic [NB_CORES-1:0] [1:0] timer_events_i,      // Timer events (2 bits per core)
+  input  logic [NB_CORES-1:0][31:0] cluster_events_i,    // Custom cluster events (32 bits per core)
+
+  // Output: mapped events for each core
+  output logic [NB_CORES-1:0][31:0] events_mapped_o
+);
+
+  // Simple event mapping for each core
+  for (genvar i = 0; i < NB_CORES; i++) begin : gen_event_mapping
+    assign events_mapped_o[i] = {
+      cluster_events_i[i][31:16],           // [31:16] Custom cluster events (upper 16 bits)
+      4'b0,                                 // [15:12] Reserved
+      acc_events_i[i],                      // [11:8]  Accelerator events
+      2'b0,                                 // [7:6]   Reserved
+      timer_events_i[i],                    // [5:4]   Timer events
+      dma_events_i[i],                      // [3:2]   DMA events
+      dispatch_events_i[i],                 // [1]     Dispatch event
+      barrier_events_i[i] | mutex_events_i[i] | periph_fifo_event_i  // [0] Combined sync/periph events
+    };
+  end
+
+endmodule : cluster_event_map

hw/tile/converters/data2obi.sv

@@ -34,11 +34,19 @@ module data2obi_req
   assign obi_req_o.a.aid                = 'b0;
   assign obi_req_o.a.a_optional.auser   = 'b0;
   assign obi_req_o.a.a_optional.wuser   = 'b0;
+
+  assign obi_req_o.a.a_optional.mid     = 'b0;
+  assign obi_req_o.a.a_optional.achk    = 'b0;
+`ifdef CV32E40X
   assign obi_req_o.a.a_optional.atop    = data_req_i.atop;
   assign obi_req_o.a.a_optional.memtype = data_req_i.memtype;
-  assign obi_req_o.a.a_optional.mid     = 'b0;
   assign obi_req_o.a.a_optional.prot    = data_req_i.prot;
   assign obi_req_o.a.a_optional.dbg     = data_req_i.dbg;
-  assign obi_req_o.a.a_optional.achk    = 'b0;
+`else
+  assign obi_req_o.a.a_optional.atop    = 'b0;
+  assign obi_req_o.a.a_optional.memtype = 'b0;
+  assign obi_req_o.a.a_optional.prot    = 'b0;
+  assign obi_req_o.a.a_optional.dbg     = 'b0;
+`endif
 
 endmodule: data2obi_req