A simple gate level ALU which is implemented in FPGA using verilog.
-
Notifications
You must be signed in to change notification settings - Fork 0
puwasuru/CO221ALU
About
A simple gate level ALU which is implemented in FPGA using verilog. Only One bit shift right and bitwise XOR operations are implemented
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published