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Add support for ARM China Star-MC2. #1735

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Add support for ARM China Star-MC2. #1735

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9 changes: 9 additions & 0 deletions pyocd/coresight/component_ids.py
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Original file line number Diff line number Diff line change
Expand Up @@ -252,5 +252,14 @@ class CmpInfo(NamedTuple):
(ARM_CHINA_ID, CORESIGHT_CLASS, 0x132, 0x00, 0x2a04) : CmpInfo('SCS', 'Star-MC1', CortexM_v8M.factory ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0x132, 0x13, 0x4a13) : CmpInfo('ETM', 'Star-MC1', None ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0x132, 0x11, 0) : CmpInfo('TPIU', 'Star-MC1', TPIU.factory ),
# Designer |Component Class |Part |Type |Archid |Name |Product |Factory
(ARM_CHINA_ID, CORESIGHT_CLASS, 0xD24, 0x31, 0x0a31) : CmpInfo('MTB', 'Star-MC2', None ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0xD24, 0x43, 0x1a01) : CmpInfo('ITM', 'Star-MC2', ITM.factory ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0xD24, 0x00, 0x1a02) : CmpInfo('DWT', 'Star-MC2', DWTv2.factory ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0xD24, 0x00, 0x1a03) : CmpInfo('BPU', 'Star-MC2', FPB.factory ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0xD24, 0x14, 0x1a14) : CmpInfo('CTI', 'Star-MC2', None ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0xD24, 0x00, 0x2a04) : CmpInfo('SCS', 'Star-MC2', CortexM_v8M.factory ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0xD24, 0x13, 0x4a13) : CmpInfo('ETM', 'Star-MC2', None ),
(ARM_CHINA_ID, CORESIGHT_CLASS, 0x132, 0x11, 0) : CmpInfo('TPIU', 'Star-MC2', TPIU.factory ),
}

2 changes: 2 additions & 0 deletions pyocd/coresight/core_ids.py
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Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@
ARM_CortexM55 = 0xD22
ARM_CortexM85 = 0xD23
ARM_China_StarMC1 = 0x132
ARM_China_StarMC2 = 0xD24

# pylint: enable=invalid_name

Expand All @@ -58,6 +59,7 @@
(CPUID_ARM, ARM_CortexM55): "Cortex-M55",
(CPUID_ARM, ARM_CortexM85): "Cortex-M85",
(CPUID_ARM_CHINA, ARM_China_StarMC1): "Star-MC1",
(CPUID_ARM_CHINA, ARM_China_StarMC2): "Star-MC2",
}

class CoreArchitecture(Enum):
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