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[ATen][Native][CUDA][SCALED_MM] limit f8f8bf16 rowwise scaled matmul to sm_90 #145728
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4972fc8
limit f8f8bf16_rowwise to sm_90
Aidyn-A 10fa410
fix regex and comments
Aidyn-A 1e2e184
include sm_89
Aidyn-A 1bfa201
check in dispatch_fp8_rowwise_kernel_on_sm
Aidyn-A f5e19af
revert changes in test_matmul_cuda.py
Aidyn-A d8acae8
revert more changes in test_matmul_cuda.py
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Shouldn't there be another change to not call into this at all?
We should fall back to another implementation for sm10+ right?
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I also think in the vary least we should have a tracker for functionality/features we skip on new hardware but we are tracking so that support can be added in full
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What about SM_90 minor version? Not relevant at all here?
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It is not relevant. But, I missed SM_89, I will include it as well.
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Correct, the current approach/kernel is not compatible with SM_100+, since there are no kernels for the Blackwell machines yet, I propose to just throw an exception. Otherwise, it will fail with a CUTLASS error, which is not an elegant behavior.
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That is a good question. I will need to check it. Thanks for reminding me about the CUTLASS update!
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#145741 @Aidyn-A
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@Aidyn-A We also need a CUDNN update (only for the versions we started the ManyLinux upgrade on so 2.6/2.8)
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Thanks @Skylion007 for the PR! I just ran the test with the latest CUTLASS 3.8 on SM_100 and got the errors:
The reason it failed with numerical mismatches is that the kernel was simply aborted with the following message:
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Seems like
__CUDA_ARCH_FEAT_SM90_ALLis not defined, not sure if this a CMAKE or CUTLASS bug.