[Bug] RP2040: only clear RX FIFO for serial pio driver clear #18581
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Previously the Full-duplex implementation would have it TX FIFO cleared although it was still sending data, as sending data happens asynchronously and we don't wait for all data to be send out before continuing with the execution of the main keyboard loop. Here we would run into a race condition where we cleared all FIFOs before starting a new transaction while the last one was still in progress. This condition can not happen with the RX FIFO as we wait for a reception to be fully completed before continuing the execution, therefore it is save to fully and unconditionally clear the RX FIFO.
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CC: @mike1808 I already tested the changes with Half-duplex PIO could you confirm again that this fixes your issue with Full-duplex PIO. |
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Great thanks for testing it out! |
ramonimbao
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Nov 28, 2022
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Description
Previously the Full-duplex implementation would have it TX FIFO cleared although it was still sending data, as sending data happens asynchronously and we don't wait for all data to be send out before continuing with the execution of the main keyboard loop. Here we would run into a race condition where we cleared all FIFOs before starting a new transaction, while the last one was still in progress.
This condition can not happen with the RX FIFO as we wait for a reception to be fully completed before continuing the execution, therefore it is save to fully and unconditionally clear the RX FIFO.
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