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RAKSHITHA R NAYAK rakshitharnayak

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rakshitharnayak/README.md

"user creativity";
import { Person } from 'India';

new Person({
    name   : 'Rakshitha R Nayak',
    title  : 'Verification Engineer',
    email  : 'rakshitharnayak13@gmail.com'
}).introduce();

D:\Rakshitha R Nayak> node index.js
Hi, my name is Rakshitha R Nayak, I'm a Verification Engineer.

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axi4_testbench axi4_testbench Public

Forked from axyrai/axi4_testbench

SystemVerilog 1
DRAM_VERIFICATION DRAM_VERIFICATION Public

JavaScript
Synchronous_FIFO Synchronous_FIFO Public

A synchronous FIFO refers to a FIFO design where data values are written sequentially into a memory array using a clock signal, and the data values are sequentially read out from the memory array u…

SystemVerilog
RISC--V-Processor RISC--V-Processor Public

RISC V PROCESSOR DESIGN IN VERILOG

Verilog 3
RAL_MODEL RAL_MODEL Public

SystemVerilog
SOLVESUDOKU SOLVESUDOKU Public

SOLVE SUDOKU IN SYSTEM VERILOG

SystemVerilog