target/riscv: clean-up register invalidation #1181

en-sc · 2024-12-06T14:51:57Z

Registers were not invalidated if the hart became unavailable.
Improved logging in the case register invalidation involves loss of information.

Change-Id: Icfb5e190dd6dcb1a97e4d314d802466cab7a01e4

JanMatCodasip

Overall, this looks all right to me. Thank you for the additional hardening of the code.

I am sending few optional suggestions about function naming and comments.

src/target/riscv/riscv_reg.h

src/target/riscv/riscv-013.c

src/target/riscv/riscv_reg.c

src/target/riscv/riscv.c

src/target/riscv/riscv-013.c

src/target/riscv/riscv.c

* Registers were not invalidated if the hart became unavailable. * Improved logging in the case register invalidation involves loss of information. Change-Id: Icfb5e190dd6dcb1a97e4d314d802466cab7a01e4 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>

src/target/riscv/riscv-013.c

en-sc requested review from JanMatCodasip and MarekVCodasip December 6, 2024 14:51

JanMatCodasip previously approved these changes Dec 10, 2024

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en-sc dismissed JanMatCodasip’s stale review via a3e1409 December 10, 2024 12:21

en-sc force-pushed the en-sc/reg-invalidate branch from f79f6d1 to a3e1409 Compare December 10, 2024 12:21

en-sc force-pushed the en-sc/reg-invalidate branch from a3e1409 to de20c2a Compare December 10, 2024 12:25

en-sc requested a review from JanMatCodasip December 10, 2024 12:26

JanMatCodasip approved these changes Dec 10, 2024

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src/target/riscv/riscv-013.c Show resolved Hide resolved

en-sc merged commit cf9963a into riscv-collab:riscv Dec 11, 2024
4 checks passed

en-sc deleted the en-sc/reg-invalidate branch December 11, 2024 13:40

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target/riscv: clean-up register invalidation #1181

target/riscv: clean-up register invalidation #1181

en-sc commented Dec 6, 2024

JanMatCodasip left a comment

target/riscv: clean-up register invalidation #1181

target/riscv: clean-up register invalidation #1181

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en-sc commented Dec 6, 2024

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