Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Specify the Name Mangling Rule for Vector Function Decorated with OpenMP #455

Open
wants to merge 2 commits into
base: master
Choose a base branch
from

Conversation

zengdage
Copy link

This pr is to introduce how to name the vector function associated to the scalar function decorated with an OpenMP declare simd directive. It' s important because library vendor and compilers must follow this rule to interface with each other. For example, now risc-v doesn't support libmvec in glibc, if we want to support it, we need to know how to name the vectorized math functions.

I have referenced the aarch64 name manling rule vfabia64 in https://github.com/ARM-software/abi-aa/blob/main/vfabia64/vfabia64.rst#vector-function-signature. The main difference is that the lmul in risc-v replace the isa in aarch64.

@zengdage
Copy link
Author

@kito-cheng Hi, I create a pr and I think we can discuss the name mangling for vector function in here.

Introduce how to name vector function associated to the scalar function
decorated with the OpenMP `declare simd` pragma. These vector functions
can be used to process multiple instances in a single invocation to
improve performance. Both library vendors and compilers must obey
this rule to interface with each other.
@zengdage zengdage force-pushed the name-mangling-vector-function-openmp branch from 4fc6edb to ffd686c Compare December 10, 2024 09:19
zengdage added a commit to zengdage/llvm-project that referenced this pull request Dec 13, 2024
1. Rename LIBMVEC_X86 into LIBMVEC to support libmvec in risc-v.
2. Add RVVM1/2/4/8 in VFISAKind to distingusih the LMUL value.
3. Declare some RVV vector math functions in VecFuncs.def.

In VecFuncs.def, I add the LI_DEFINE_VECFUNC of LIBMVEC_RVV as follow:

'''
TLI_DEFINE_VECFUNC("sin", "_ZGV1Nxv_sin", SCALABLE(1), "_ZGVr1Nxv")
TLI_DEFINE_VECFUNC("sin", "_ZGV2Nxv_sin", SCALABLE(2), "_ZGVr2Nxv")

TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV1Nxv_expf", SCALABLE(2), "_ZGVr1Nxv")
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV2Nxv_expf", SCALABLE(4), "_ZGVr2Nxv")
'''

The 'VEC' of TLI_DEFINE_VECFUNC is like '_ZGV2Nxv_sin', its name mangling rules
defined in

riscv-non-isa/riscv-elf-psabi-doc#455

The 'VF' of TLI_DEFINE_VECFUNC is like 'SCALABLE(2)', it should be
'vscale x (LMUL * 64 / sizeof(Type)'.

The 'VABI_PREFIX' of TLI_DEFINE_VECFUNC is like '_ZGVr1Nxv', 'r' means RISC-V
vector extension, '1' is the LMUL value.
'''
_ZGVr1Nxv  --> RISC-V Vector Extension with LMUL=1
_ZGVr2Nxv  --> RISC-V Vector Extension with LMUL=2
_ZGVr4Nxv  --> RISC-V Vector Extension with LMUL=4
_ZGVr8Nxv  --> RISC-V Vector Extension with LMUL=8
'''
zengdage added a commit to zengdage/llvm-project that referenced this pull request Dec 13, 2024
1. Rename LIBMVEC_X86 into LIBMVEC to support libmvec in risc-v.
2. Add RVVM1/2/4/8 in VFISAKind to distingusih the LMUL value.
3. Declare some RVV vector math functions in VecFuncs.def.

In VecFuncs.def, I add the LI_DEFINE_VECFUNC of LIBMVEC_RVV as follow:

```
TLI_DEFINE_VECFUNC("sin", "_ZGV1Nxv_sin", SCALABLE(1), "_ZGVr1Nxv")
TLI_DEFINE_VECFUNC("sin", "_ZGV2Nxv_sin", SCALABLE(2), "_ZGVr2Nxv")

TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV1Nxv_expf", SCALABLE(2), "_ZGVr1Nxv")
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV2Nxv_expf", SCALABLE(4), "_ZGVr2Nxv")
```

The `VEC` of TLI_DEFINE_VECFUNC (e.g., `_ZGV2Nxv_sin`), its name mangling rules
defined in

riscv-non-isa/riscv-elf-psabi-doc#455

Now it's still under review.

The `VF` (e.g., `SCALABLE(2)`), it should be `vscale x (LMUL * 64 / sizeof(Type)`.

The `VABI_PREFIX` (e.g., `_ZGVr1Nxv`), `r` means RISC-V vector extension, `1` is
the LMUL value.

```
_ZGVr1Nxv  --> RISC-V Vector Extension with LMUL=1
_ZGVr2Nxv  --> RISC-V Vector Extension with LMUL=2
_ZGVr4Nxv  --> RISC-V Vector Extension with LMUL=4
_ZGVr8Nxv  --> RISC-V Vector Extension with LMUL=8
```
@zengdage
Copy link
Author

ping @kito-cheng , @topperc

riscv-elf.adoc Outdated

[source,abnf]
----
mangled-vector-name := "_ZGV" <lmul> <mask> <len> <parameters> "_" <func-name>
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Should this be "_ZGVr"?

Copy link
Author

@zengdage zengdage Dec 14, 2024

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I also have considered using "_ZGVr", but it will lack LMUL information and so just support a single fixed LMUL value. _ZGV_xxx(vfloat64m4_t) and __ZGV_xxx(vfloat64m2_t) have different computing power. I think if we want to take full advantage of RVV computing power, and need to attach LMUL information into vector function name.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I just meant an r before the LMUL. There's an r in this patch right? llvm/llvm-project#119844

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

The reason I chose "_ZGV" in the first place is that GCC take a single character as isa name in simd_clone_mangle (vecsize_mangle in struct cgraph_simd_clone), so I delete "r" from "r1/2/4/8" to meet gcc requirements.

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Added "r" in isa field.

@topperc
Copy link
Contributor

topperc commented Dec 14, 2024 via email

@ZhijinZeng1
Copy link

I’m not sure we should let a gcc implementation detail constrain the spec. Is it possible to encode the LMUL in the length field maybe by putting a number after the 'x'?

On Fri, Dec 13, 2024 at 7:11 PM Zhijin Zeng @.> wrote: @.* commented on this pull request. ------------------------------ In riscv-elf.adoc <#455 (comment)> : > @@ -234,6 +234,116 @@ type-name = identifier-nondigit identifier-char identifier-nondigit = ALPHA / "" identifier-char = identifier-nondigit / "" ---- + +== Name Mangling for Vector Function + +This section describes how to name vector functions corresponding to scalar +functions which are decorated with #pragma omp declare simd. The order of the +vector function parameters should be the same as that of the original scalar +function. + +Name mangling rule for vector functions. + +[source,abnf] +---- +mangled-vector-name := "ZGV" "" I also have considered using "_ZGVr", but it will lack LMUL information and so just support a fixed LMUL value. _ZGV_xxx(vfloat64m4_t) and __ZGV_xxx(vfloat64m2_t) have different computing power. I think if we want to take full advantage of RVV computing power, and need to attach LMUL information into vector function name. — Reply to this email directly, view it on GitHub <#455 (comment)>, or unsubscribe https://github.com/notifications/unsubscribe-auth/AFMFNKXMIATBZMZQRAO6IQT2FOOU7AVCNFSM6AAAAABSUO6PU2VHI2DSMVQWIX3LMV43YUDVNRWFEZLROVSXG5CSMV3GSZLXHMZDKMBTGQ4TONRYHA . You are receiving this because you were mentioned.Message ID: @.**>

This is more complicated in GCC and LLVM. Because GCC just support taking constant value as length, and LLVM need to use ISA to determine ElementCount. So I think that "_ZGVr1/2/4/8" or "_ZGV1/2/4/8" is more better.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

3 participants