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Why is there core timer? #2

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luojia65 opened this issue Feb 24, 2020 · 2 comments
Open

Why is there core timer? #2

luojia65 opened this issue Feb 24, 2020 · 2 comments

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@luojia65
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luojia65 commented Feb 24, 2020 •
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I found this name in both patches/gd32vf103.yaml and generated pac crate. The User Manual provided by GigaDevice (I have its version 1.2) have not documented on a peripheral called ctimer.

Is this provided by the chip but not documented? Or is this peripheral wrapped from RISC-V's core CSR configurations? I need to know why we apply this patch. Thanks!
@Disasm
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Disasm commented Feb 24, 2020

This peripheral wasn't in GD32VF103.svd for some reason, but it does exist in a chip. It's a core peripheral and documented in "Bumblebee core datasheet" and not "User manual".

@luojia65
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Thanks! I'll check them out :)

@kassane kassane mentioned this issue Jul 22, 2022
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@Disasm @luojia65