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update: Update dependencies and precompiled library #56

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update: Update dependencies and precompiled library #56

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bb96c8f
update: update dependencies, remove bare_metal::Nr
rmsyn May 26, 2023
b3f6e24
eclic-mode-hack: add `zicsr` option
rmsyn May 26, 2023
d9dd6f1
gd32vf103xx-hal.a: update precompiled library
rmsyn May 26, 2023
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7 changes: 5 additions & 2 deletions Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -10,14 +10,17 @@ license = "ISC"
edition = "2018"

[dependencies]
gd32vf103-pac = "0.4.0"
riscv = "0.6.0"
riscv = "0.10.1"
nb = "0.1.2"
void = { version = "1.0.2", default-features = false }
cast = { version = "0.2.3", default-features = false }
vcell = "0.1.2"
embedded-dma = "0.1.2"

[dependencies.gd32vf103-pac]
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gd32vf103-pac v0.5.0 is now published

version = "0.5.0"
features = ["critical-section"]

[dependencies.embedded-hal]
version = "0.2.3"
features = ["unproven"]
Expand Down
Binary file modified bin/gd32vf103xx-hal.a
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2 changes: 2 additions & 0 deletions eclic-mode-hack.S
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Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,8 @@

#define MSTATUS_MIE 0x00000008

.option arch, +zicsr

.macro DISABLE_MIE
csrc CSR_MSTATUS, MSTATUS_MIE
.endm
Expand Down
79 changes: 39 additions & 40 deletions src/eclic.rs
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Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
use crate::pac::ECLIC;
use riscv::interrupt::Nr;
use crate::pac::{ECLIC, Interrupt};

const EFFECTIVE_LEVEL_PRIORITY_BITS: u8 = 4;

Expand Down Expand Up @@ -84,43 +83,43 @@ pub trait EclicExt {
fn get_priority_bits() -> u8;

/// Setup `interrupt`
fn setup<I: Nr + Copy>(interrupt: I, tt: TriggerType, level: Level, priority: Priority);
fn setup(interrupt: Interrupt, tt: TriggerType, level: Level, priority: Priority);

/// Enables `interrupt`
unsafe fn unmask<I: Nr>(interrupt: I);
unsafe fn unmask(interrupt: Interrupt);

/// Disables `interrupt`
fn mask<I: Nr>(interrupt: I);
fn mask(interrupt: Interrupt);

/// Checks if `interrupt` is enabled
fn is_enabled<I: Nr>(interrupt: I) -> bool;
fn is_enabled(interrupt: Interrupt) -> bool;

/// Forces `interrupt` into pending state
fn pend<I: Nr>(interrupt: I);
fn pend(interrupt: Interrupt);

/// Clears `interrupt`'s pending state
fn unpend<I: Nr>(interrupt: I);
fn unpend(interrupt: Interrupt);

/// Checks if `interrupt` is pending
fn is_pending<I: Nr>(interrupt: I) -> bool;
fn is_pending(interrupt: Interrupt) -> bool;

/// Set `interrupt` trigger type
fn set_trigger_type<I: Nr>(interrupt: I, tt: TriggerType);
fn set_trigger_type(interrupt: Interrupt, tt: TriggerType);

/// Get `interrupt` trigger type
fn get_trigger_type<I: Nr>(interrupt: I) -> Option<TriggerType>;
fn get_trigger_type(interrupt: Interrupt) -> Option<TriggerType>;

// Set `interrupt` level
fn set_level<I: Nr>(interrupt: I, level: Level);
fn set_level(interrupt: Interrupt, level: Level);

// Get `interrupt` level
fn get_level<I: Nr>(interrupt: I) -> Level;
fn get_level(interrupt: Interrupt) -> Level;

// Set `interrupt` priority
fn set_priority<I: Nr>(interrupt: I, priority: Priority);
fn set_priority(interrupt: Interrupt, priority: Priority);

// Get `interrupt` interrupt
fn get_priority<I: Nr>(interrupt: I) -> Priority;
fn get_priority(interrupt: Interrupt) -> Priority;
}

impl EclicExt for ECLIC {
Expand Down Expand Up @@ -181,7 +180,7 @@ impl EclicExt for ECLIC {
EFFECTIVE_LEVEL_PRIORITY_BITS - Self::get_level_bits()
}

fn setup<I: Nr + Copy>(interrupt: I, tt: TriggerType, level: Level, priority: Priority) {
fn setup(interrupt: Interrupt, tt: TriggerType, level: Level, priority: Priority) {
Self::mask(interrupt);
Self::set_trigger_type(interrupt, tt);
Self::set_level(interrupt, level);
Expand All @@ -190,17 +189,17 @@ impl EclicExt for ECLIC {
}

#[inline]
unsafe fn unmask<I: Nr>(interrupt: I) {
let nr = usize::from(interrupt.nr());
unsafe fn unmask(interrupt: Interrupt) {
let nr = interrupt as usize;

(*Self::ptr()).clicints[nr]
.clicintie
.write(|w| w.ie().set_bit())
}

#[inline]
fn mask<I: Nr>(interrupt: I) {
let nr = usize::from(interrupt.nr());
fn mask(interrupt: Interrupt) {
let nr = interrupt as usize;

unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -210,8 +209,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn is_enabled<I: Nr>(interrupt: I) -> bool {
let nr = usize::from(interrupt.nr());
fn is_enabled(interrupt: Interrupt) -> bool {
let nr = interrupt as usize;

unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -223,8 +222,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn pend<I: Nr>(interrupt: I) {
let nr = usize::from(interrupt.nr());
fn pend(interrupt: Interrupt) {
let nr = interrupt as usize;

unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -234,8 +233,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn unpend<I: Nr>(interrupt: I) {
let nr = usize::from(interrupt.nr());
fn unpend(interrupt: Interrupt) {
let nr = interrupt as usize;

unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -245,8 +244,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn is_pending<I: Nr>(interrupt: I) -> bool {
let nr = usize::from(interrupt.nr());
fn is_pending(interrupt: Interrupt) -> bool {
let nr = interrupt as usize;

unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -258,8 +257,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn set_trigger_type<I: Nr>(interrupt: I, tt: TriggerType) {
let nr = usize::from(interrupt.nr());
fn set_trigger_type(interrupt: Interrupt, tt: TriggerType) {
let nr = interrupt as usize;

unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -269,8 +268,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn get_trigger_type<I: Nr>(interrupt: I) -> Option<TriggerType> {
let nr = usize::from(interrupt.nr());
fn get_trigger_type(interrupt: Interrupt) -> Option<TriggerType> {
let nr = interrupt as usize;

match unsafe { (*Self::ptr()).clicints[nr].clicintattr.read().trig().bits() } {
0 => Some(TriggerType::Level),
Expand All @@ -281,8 +280,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn set_level<I: Nr>(interrupt: I, level: Level) {
let nr = usize::from(interrupt.nr());
fn set_level(interrupt: Interrupt, level: Level) {
let nr = interrupt as usize;

let mut intctl = unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -307,8 +306,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn get_level<I: Nr>(interrupt: I) -> Level {
let nr = usize::from(interrupt.nr());
fn get_level(interrupt: Interrupt) -> Level {
let nr = interrupt as usize;

let intctl = unsafe {
(*Self::ptr()).clicints[nr]
Expand All @@ -325,8 +324,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn set_priority<I: Nr>(interrupt: I, priority: Priority) {
let nr = usize::from(interrupt.nr());
fn set_priority(interrupt: Interrupt, priority: Priority) {
let nr = interrupt as usize;

let mut intctl = unsafe {
(*Self::ptr()).clicints[nr]
Expand Down Expand Up @@ -354,8 +353,8 @@ impl EclicExt for ECLIC {
}

#[inline]
fn get_priority<I: Nr>(interrupt: I) -> Priority {
let nr = usize::from(interrupt.nr());
fn get_priority(interrupt: Interrupt) -> Priority {
let nr = interrupt as usize;

let intctl = unsafe {
(*Self::ptr()).clicints[nr]
Expand Down
2 changes: 1 addition & 1 deletion src/gpio.rs
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Expand Up @@ -117,7 +117,7 @@ trait PeripheralAccess {
let value = (bits as u32) << offset;
let regs = Self::peripheral();

interrupt::free(|_| {
interrupt::free(|| {
if index < 8 {
regs.ctl0.modify(|r, w| unsafe {
w.bits((r.bits() & mask) | value)
Expand Down
6 changes: 3 additions & 3 deletions src/rcu.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -327,14 +327,14 @@ macro_rules! bus_enable {
impl Enable for crate::pac::$PER {
#[inline(always)]
fn enable(rcu: &mut Rcu) {
interrupt::free(|_| {
interrupt::free(|| {
rcu.regs.$apben.modify(|_, w| w.$peren().set_bit());
});
}

#[inline(always)]
fn disable(rcu: &mut Rcu) {
interrupt::free(|_| {
interrupt::free(|| {
rcu.regs.$apben.modify(|_, w| w.$peren().clear_bit());
});
}
Expand All @@ -350,7 +350,7 @@ macro_rules! bus {
impl Reset for crate::pac::$PER {
#[inline(always)]
fn reset(rcu: &mut Rcu) {
interrupt::free(|_| {
interrupt::free(|| {
rcu.regs.$apbrst.modify(|_, w| w.$perrst().set_bit());
rcu.regs.$apbrst.modify(|_, w| w.$perrst().clear_bit());
});
Expand Down