Should vector crypto instructions constraint vd_num/vs1_num/vs2_num align to lmul?

[GuoShibo-cn]

According to zvkned_ext_macros.h, no where constraint vd/vs1 number align to lmul. And overlap just check vs_num == vd_num.

however even with vlen =128, it would be possible to set lmul = 2, register groups could overlap with numbers not the same.

[scottj97]

Can you give a specific example of a case you think is broken today?

[GuoShibo-cn]

Sorry for delay.

Our VLEN is 256 ,this is our simulation result, in the log we use lmul = 4, dst reg_num & src reg_num is not align to lmul, for vector arithmatic instruction this would cause illegal instruction trap, howerver spike just continue the calcualtion.

[aswaterman]

cc @egouriou-rivos (and @chihminchao)

[timhsu404]

Yes, the vector crypto extensions should follow the LMUL alignment requirement.
Though the spec do not describe this behavior explicity, it does not make sense that register can not be the same but the content can still possible to overlap or out of the normal register range, the case v30 with LMUL=4 above.

I will create a PR for it.

[xinyuwang-starfive]

what status of the PR

[aswaterman]

cc @timhsu404

[nibrunieAtSi5]

@timhsu404 any progress on this issue ?

[chihminchao]

@timhsu404 is busy with another internal issue and may not have time on this issue this month.

[timhsu404]

any progress on this issue ?

@nibrunieAtSi5 Not really. I have already done the very first version, but still tracking on some bugs.
The progress is pending for now, I'll keep working on this issue after the urgent job has been done.

[DavidYu360]

Vector crypto instruction VPR alignment rules:
Possible alignment value: 1, 2, 4, 8 (1 for any VPR, 2 for V0, V2, ...)
Prerequisite: VLEN * LMUL >= EGW

1. Single key in .vs inst: max(EGW/VLEN, 1)
2. Others: max(LMUL, 1)

[nibrunie]

I have developed a test case, https://gist.github.com/nibrunie/80a00047dce935011614530d86a829e6, which seems to be passing with flying colors on spike when I would have expected almost every instruction to trap.