Make sure that sc after failure sc fails

[mohanson]

Regardless of success or failure, executing an SC.W instruction invalidates any reservation held by this hart. So sc after failure sc must fails.

[aswaterman]

This test doesn't work. It gets stuck in an infinite loop when executed on Spike because the first SC is to a different address than the LR.

[mohanson]

I mistakenly used an old lrsc binary for testing. I have fixed this.

[aswaterman]

I don't think this version is correct, either, even though it now passes on Spike. The problem is that implementations are allowed to reserve more than one word of memory on an LR, so the SC might succeed on some implementations even though the addresses differ. On such implementations, this version will loop forever.

I made a version of this that does work in general, by piggy-backing on the previous test, which does contain an SC that we know will fail by construction. 394937e

[mohanson]

Your version is better, this PR no longer needs to open.