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Merge branch 'main' into 303-add-missing-recommendations-to-profiles
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@james-ball-qualcomm
james-ball-qualcomm authored Nov 23, 2024
2 parents edb1d4b + daeadcf commit 230d84f
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Showing 4 changed files with 31 additions and 31 deletions.
10 changes: 5 additions & 5 deletions arch/profile_release/MockProfileRelease.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ MockProfileRelease:
extensions:
A:
presence: optional
version: "= 2.1"
version: "~> 2.1"
I:
presence: mandatory
version: "~> 2.1"
Expand All @@ -52,21 +52,21 @@ MockProfileRelease:
S:
presence:
optional: localized
version: "= 1.12"
version: "~> 1.12"
Zifencei:
presence:
optional: development
version: "= 2.0"
version: "~> 2.0"
note:
Zihpm:
presence:
optional: expansion
version: "= 2.0"
version: "~> 2.0"
note: Made this a expansion option
Sv48:
presence:
optional: transitory
version: "= 1.11"
version: "~> 1.11"
note: Made this a transitory option
extra_notes:
- presence: mandatory
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28 changes: 14 additions & 14 deletions arch/profile_release/RVA20.yaml
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Expand Up @@ -66,29 +66,29 @@ RVA20:
presence: mandatory
Ziccif:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Ziccif is a profile-defined extension introduced with RVA20.
The fetch atomicity requirement facilitates runtime patching
of aligned instructions.
Ziccrse:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: Ziccrse is a profile-defined extension introduced with RVA20.
Ziccamoa:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: Ziccamo is a profile-defined extension introduced with RVA20.
Za128rs:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Za128rs is a profile-defined extension introduced with RVA20.
The minimum reservation set size is effectively determined by the
size of atomic accesses in the `A` extension.
Zicclsm:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Zicclsm is a profile-defined extension introduced with RVA20.
This requires misaligned support for all regular load and store
Expand Down Expand Up @@ -140,23 +140,23 @@ RVA20:
extensions:
S:
presence: mandatory
version: "= 1.11"
version: "~> 1.11"
Zifencei:
presence: mandatory
version: "= 2.0"
version: "~> 2.0"
note: |
Zifencei is mandated as it is the only standard way to support
instruction-cache coherence in RVA20 application processors. A new
instruction-cache coherence mechanism is under development which might
be added as an option in the future.
Svbare:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Svbare is a new extension name introduced with RVA20.
Sv39:
presence: mandatory
version: "= 1.11"
version: "~> 1.11"
Svade:
presence: mandatory
version: "~> 1.0"
Expand All @@ -167,24 +167,24 @@ RVA20:
`Svadu`.
Ssccptr:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Ssccptr is a new extension name introduced with RVA20.
Sstvecd:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Sstvecd is a new extension name introduced with RVA20.
Sstvala:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Sstvala is a new extension name introduced with RVA20.
Sv48:
presence: optional
version: "= 1.11"
version: "~> 1.11"
Ssu64xl:
presence: optional
version: "= 1.0"
version: "~> 1.0"
note: |
Ssu64xl is a new extension name introduced with RVA20.
10 changes: 5 additions & 5 deletions arch/profile_release/RVA22.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -46,10 +46,10 @@ RVA22:
$inherits: "profile_release/RVA20.yaml#/RVA20/profiles/RVA20U64/extensions"
Zihpm:
presence: mandatory
version: "= 2.0"
version: "~> 2.0"
Zihintpause:
presence: mandatory
version: "= 2.0"
version: "~> 2.0"
note: |
While the `pause` instruction is a HINT can be implemented as a
NOP and hence trivially supported by hardware implementers, its
Expand All @@ -68,7 +68,7 @@ RVA22:
version: "~> 1.0"
Zic64b:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
This is a new extension name for this feature. While the general
RISC-V specifications are agnostic to cache block size, selecting a
Expand Down Expand Up @@ -174,10 +174,10 @@ RVA22:
$inherits: "profile_release/RVA20.yaml#/RVA20/profiles/RVA20S64/extensions"
S:
presence: mandatory
version: "= 1.12"
version: "~> 1.12"
Sscounterenw:
presence: mandatory
version: "= 1.0"
version: "~> 1.0"
note: |
Sstvala is a new extension name introduced with RVA22.
Svpbmt:
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14 changes: 7 additions & 7 deletions arch/profile_release/RVI20.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -50,35 +50,35 @@ RVI20:
correctly indicate that `fence.tso` is mandatory.
A:
presence: optional
version: "= 2.1"
version: "~> 2.1"
C:
presence: optional
version: "= 2.2"
version: "~> 2.2"
D:
presence: optional
version: "= 2.2"
version: "~> 2.2"
note: |
NOTE: The rationale to not include Q as a profile option is that
quad-precision floating-point is unlikely to be implemented in
hardware, and so we do not require or expect software to expend effort
optimizing use of Q instructions in case they are present.
F:
presence: optional
version: "= 2.2"
version: "~> 2.2"
M:
presence: optional
version: "= 2.0"
version: "~> 2.0"
Zicntr:
presence: optional
version: " = 2.0"
Zihpm:
presence: optional
version: "= 2.0"
version: "~> 2.0"
note: |
The number of counters is platform-specific.
Zifencei:
presence: optional
version: "= 2.0"
version: "~> 2.0"
recommendations:
- text: |
Implementations are strongly recommended to raise illegal-instruction
Expand Down

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