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Questions about AIA and Smcsrind/Sscsrind extensions #114

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NewPaulWalker opened this issue Jan 10, 2025 · 0 comments
Open

Questions about AIA and Smcsrind/Sscsrind extensions #114

NewPaulWalker opened this issue Jan 10, 2025 · 0 comments

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@NewPaulWalker
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In the riscv-interrupts manual, there is a description like this:

If extension Sscsrind is also implemented, then when vsiselect has a value in the range 0x30-0x3F or 0x70-0xFF, attempts from M-mode or HS-mode to access alias CSRs vsireg2 through vsireg6 raise an illegal instruction exception, and attempts from VS-mode to access sireg2 through sireg6 raise a virtual instruction exception.

What does "xxx vsireg2 through vsireg6 xxx" mean here? Literally, it seems to suggest some mechanism that allows accessing vsireg2 from vsireg6, but I think what it's trying to express is accessing vsireg2, vsireg3, vsireg4, vsireg5, vsireg6, right?

Additionally, based on my understanding of the Smcsrind/Sscsrind extension, for alias CSRs other than mireg/sireg/vsireg—such as vsireg2, vsireg3, etc.—when the corresponding xxiselect is within 0x30-0x3F or 0x70-0xFF, these should be reserved for vsireg2 and vsireg3.

Therefore, when vsiselect is within 0x30-0x3F, should accessing sireg2 (which is actually vsireg2) from the VS mode raise an illegal instruction exception because it is in a reserved region? Or should it raise a virtual instruction exception based on the sentence above?

I also noticed this sentence in the manual:

Changes for RC5
Better aligned the rules for indirectly accessed registers with the hypervisor extension and with forthcoming extension Smcsrind/Sscsrind. In particular, when vsiselect has a reserved value, attempts to access sireg from a virtual machine (VS or VU-mode) should preferably raise an illegal instruction exception instead of a virtual instruction exception.

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