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29 Open 54 Closed
29 Open 54 Closed
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Issues list

SEI (major 9, delegated to S mode) or STI (major 5, not delegated)，which has a higher priority?
#118 opened Feb 18, 2025 by ic-nerd
1
Question about effect of hvictl.VTI when hvictl.IID=9
#117 opened Jan 23, 2025 by Yasinhwang
1
Read of sip.SEIP does not return mvip.SEIP even if mvien.SEIP = 1 & mideleg = 0
#116 opened Jan 22, 2025 by jeffy1009
1
Can hvictl takes effect on pending bits on mip/hip/sip/vsip and impact the interrupt taken without accessing mvip/hvip and without interrupt signals?
#115 opened Jan 19, 2025 by Steven-Li-Xiaogang
7
Questions about AIA and Smcsrind/Sscsrind extensions
#114 opened Jan 10, 2025 by NewPaulWalker
S-level external interrupts default priority order (when handled in M-mode)
#110 opened Dec 10, 2024 by evgeniy-paltsev
1
S-level external interrupts priority value when handled in M-mode
#109 opened Dec 10, 2024 by evgeniy-paltsev
1
A question of Interrupt filtering？
#105 opened Nov 20, 2024 by ZeyueShen
4
Supervisor-level iprio configurability
#102 opened Oct 31, 2024 by evgeniy-paltsev
3
Can hvictl inject an interrupt with IID=0 and IPRIO=0?
#98 opened Oct 11, 2024 by zhuotianshu
3
If S external interrupt is injected to S with mvien & mvip than there is no clear rule to determine its priority
#97 opened Oct 9, 2024 by evgeniy-paltsev
2
Question of a machine-level trap handler described in aia spec(5.2.2)
#96 opened Sep 24, 2024 by ZeyueShen
2
What's the value of stopi.IPRIO when using mvien and mvip to generate a SEI that traps to S mode?
#91 opened Aug 12, 2024 by zhuotianshu
5
Conflict register model between MVIEN and HVIEN
#78 opened Apr 25, 2024 by zetalog
1
mvien[1]
#77 opened Apr 22, 2024 by Mei-x-l
1
local interrupts in sip and vsip may be cleared when other CSRs change
#76 opened Mar 26, 2024 by jhauser-us
About the possibility of IOMMU examining ie bit before sending notify MSI.
#75 opened Mar 14, 2024 by zhuotianshu
Does SEI in VS mode use default priority?
#73 opened Mar 12, 2024 by zhuotianshu
2
Are priorities of virtual interrupts configurable to HS-mode through iprio array?
#71 opened Mar 11, 2024 by YenHaoChen
3
About the "sticky" property of sip.
#70 opened Mar 10, 2024 by zhuotianshu
1
What's the purpose of virtual interrupts?
#67 opened Feb 25, 2024 by zhuotianshu
4
Add a comment calling out the software-writable bit behind mip.SEIP
#65 opened Feb 7, 2024 by jhauser-us
Question regarding mvip[9]
#62 opened Jan 31, 2024 by gzaitd
2
How hvictl affect vstopi? Is every value legal?
#61 opened Jan 9, 2024 by n1240549
1
APLIC's domaincfg.IE bit and idelivery registers affect only interrupt delivery
#57 opened Nov 7, 2023 by jhauser-us
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