Making changes Christian requested in PR.

src/clic.adoc

@@ -1530,7 +1530,7 @@ When a hardware vectored interrupt is taken, the hart hardware loads the vector
 table entry for the associated interrupt (table pointed to {tvt} CSR),
 masks off the least-significant bit (for IALIGN=16) or masks of the 2 least-significant bits (for IALIGN=32),
 and then jumps to the masked address.
-The masked vector table entry bit(s) are reserved and should be zero (undefined what happens if they aren't zero).
+The masked vector table entry bit(s) are reserved and should be zero.
 When a software vectored interrupt is taken, the hart jumps to the address in the {tvec} CSR and then
 it is software's responsibility to load the vector table entry for the associated interrupt
 and jump to the address in that entry.