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Release riscv-isa-release-05175a7-2024-07-23
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@riscv-tech-admin riscv-tech-admin released this 23 Jul 23:37
· 137 commits to main since this release
riscv-isa-release-05175a7-2024-07-23
bc6a9b7
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Learn about vigilant mode.

This release was created by: aswaterman
Release of RISC-V ISA, built from commit 05175a7, is now available.

What's Changed

  • Clarify that MXR affects explicit memory accesses only by @aswaterman in #1543
  • Clarify that only read-only accesses to the seed CSR are forbidden by @aswaterman in #1540
  • Clarify that mtime -> time has propagation delay by @aswaterman in #1514

Full Changelog: riscv-isa-release-3544bba-2024-07-23...riscv-isa-release-05175a7-2024-07-23

Contributors

aswaterman
Assets 8
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