Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Replacig simm und uimm with offset #41

Merged
merged 1 commit into from
Jul 4, 2024
Merged

Replacig simm und uimm with offset #41

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
24 changes: 12 additions & 12 deletions zilsd.adoc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -23,12 +23,12 @@ The Zilsd extension adds the following RV32-only instructions:

|yes
|no
|ld rd, simm(rs1)
|ld rd, offset(rs1)
|<<#insns-ld>>

|yes
|no
|sd rs2, simm(rs1)
|sd rs2, offset(rs1)
|<<#insns-sd>>

|===
Expand Down Expand Up @@ -59,22 +59,22 @@ Zcmlsd adds the following RV32-only instructions:

|yes
|no
|c.ldsp rd, uimm(sp)
|c.ldsp rd, offset(sp)
|<<#insns-cldsp>>

|yes
|no
|c.sdsp rs2, uimm(sp)
|c.sdsp rs2, offset(sp)
|<<#insns-csdsp>>

|yes
|no
|c.ld rd', uimm(rs1')
|c.ld rd', offset(rs1')
|<<#insns-cld>>

|yes
|no
|c.sd rs2', uimm(rs1')
|c.sd rs2', offset(rs1')
|<<#insns-csd>>

|===
Expand Down Expand Up @@ -130,7 +130,7 @@ Synopsis::
Load doubleword to even/odd register pair, 32-bit encoding

Mnemonic::
ld rd, simm(rs1)
ld rd, offset(rs1)

Encoding (RV32)::
[wavedrom, ,svg]
Expand Down Expand Up @@ -160,7 +160,7 @@ Synopsis::
Store doubleword from even/odd register pair, 32-bit encoding

Mnemonic::
sd rs2, simm(rs1)
sd rs2, offset(rs1)

Encoding (RV32)::
[wavedrom, ,svg]
Expand Down Expand Up @@ -191,7 +191,7 @@ Synopsis::
Stack-pointer based load doubleword to even/odd register pair, 16-bit encoding

Mnemonic::
c.ldsp rd, uimm(sp)
c.ldsp rd, offset(sp)

Encoding (RV32)::
[wavedrom, ,svg]
Expand Down Expand Up @@ -219,7 +219,7 @@ Synopsis::
Stack-pointer based store doubleword from even/odd register pair, 16-bit encoding

Mnemonic::
c.sdsp rs2, uimm(sp)
c.sdsp rs2, offset(sp)

Encoding (RV32)::
[wavedrom, ,svg]
Expand All @@ -246,7 +246,7 @@ Synopsis::
Load doubleword to even/odd register pair, 16-bit encoding

Mnemonic::
c.ld rd', uimm(rs1')
c.ld rd', offset(rs1')

Encoding (RV32)::
[wavedrom, ,svg]
Expand Down Expand Up @@ -276,7 +276,7 @@ Synopsis::
Store doubleword from even/odd register pair, 16-bit encoding

Mnemonic::
c.sd rs2', uimm(rs1')
c.sd rs2', offset(rs1')

Encoding (RV32)::
[wavedrom, ,svg]
Expand Down
Loading