Add unratified B extension

riscv · Jun 12, 2024 · 69ec6bd · 69ec6bd
1 parent ba35af5
commit 69ec6bd
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/model/riscv_sys_control.sail b/model/riscv_sys_control.sail
@@ -483,6 +483,7 @@ function init_sys() -> unit = {
   misa[MXL] = arch_to_bits(if sizeof(xlen) == 32 then RV32 else RV64);
   misa[A]   = 0b1;                             /* atomics */
   misa[C]   = bool_to_bits(sys_enable_rvc());  /* RVC */
+  misa[B]   = 0b1;                             /* Bit-manipulation */
   misa[I]   = 0b1;                             /* base integer ISA */
   misa[M]   = 0b1;                             /* integer multiply/divide */
   misa[U]   = 0b1;                             /* user-mode */