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Generate illegal instruction traps for s* CSR accesses if misa.S is not set #126

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michaeljclark opened this issue Apr 4, 2018 · 0 comments
Open

Generate illegal instruction traps for s* CSR accesses if misa.S is not set #126

michaeljclark opened this issue Apr 4, 2018 · 0 comments
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qemu-for-upstream Fixed in the qemu-for-upstream branch

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@michaeljclark
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misa.S indicates the machine supports S mode, and hence implements the s*CSRs, either returning the required values, or hard-coded to zero as specified.

However, if S-mode is not implemented, s* CSR accesses should generate illegal instruction traps.
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qemu-for-upstream Fixed in the qemu-for-upstream branch
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