-
Notifications
You must be signed in to change notification settings - Fork 154
Home
Welcome to the riscv-qemu wiki!
The RISC-V QEMU port implements the following specifications:
- RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2
- RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.9.1
- RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.10
The RISC-V QEMU port supports the following instruction set extensions:
- RV32GC with Supervisor-mode and User-mode (RV32IMAFDCSU)
- RV64GC with Supervisor-mode and User-mode (RV64IMAFDCSU)
The QEMU Wiki platform page for RISC-V is here:
The RISC-V QEMU port supports the following targets:
- riscv32-softmmu (RV32 full-system emulator)
- riscv64-softmmu (RV64 full-system emulator)
- riscv32-linux-user (RV32 linux user-mode emulator)
- riscv64-linux-user (RV64 linux user-mode emulator)
The RISC-V QEMU port supports the following hardware blocks and features:
- HTIF Console (Host Target Interface)
- SiFive CLINT (Core Local Interruptor) for Timer interrupts and IPIs
- SiFive PLIC (Platform Level Interrupt Controller)
- SiFive Test (Test Finisher) for exiting simulation
- SiFive UART, PRCI, AON, PWM, QSPI support is partially implemented
- VirtIO MMIO (GPEX PCI support will be added in a future patch)
- Generic 16550A UART emulation using 'hw/char/serial.c'
- MTTCG and SMP support (PLIC and CLINT) on the 'virt' machine
The RISC-V QEMU full system emulator supports 5 machines:
- 'spike_v1.9.1'; CLINT, PLIC, HTIF console, config-string, Priv ISA v1.9.1
- 'spike_v1.10'; CLINT, PLIC, HTIF console, device-tree, Priv ISA v1.10
- 'sifive_e'; CLINT, PLIC, SiFive UART, HiFive1 compat, Priv ISA v1.10
- 'sifive_u'; CLINT, PLIC, SiFive UART, device-tree, Priv ISA v1.10
- 'virt'; CLINT, PLIC, 16550A UART, VirtIO, device-tree, Priv ISA v1.10
Building the full system emulator and the user mode emulator on Linux:
git clone --recursive https://github.com/riscv/riscv-qemu.git
cd riscv-qemu
./configure \
--target-list=riscv64-softmmu,riscv32-softmmu,riscv64-linux-user,riscv32-linux-user
make -j$(nproc)
make install
Building the full system emulator on macOS or other platforms:
git clone --recursive https://github.com/riscv/riscv-qemu.git
cd riscv-qemu
./configure \
--target-list=riscv64-softmmu,riscv32-softmmu
make -j$(nproc)
make install
Invoking the spike
machine:
qemu-system-riscv64 -nographic -machine spike_v1.10 -kernel bbl-linux-4.15
Note: this depends on bbl configured with a linux kernel plus initramfs payload.
Invoking the sifive_e300
machine with a HiFive1 binary:
qemu-system-riscv32 -nographic -machine sifive_e -kernel freedom-e-sdk/software/hello/hello
Note: this depends on SiFive's freedom-e-sdk examples compiled for the HiFive1.
Invoking the virt
machine with virtual disk and tun/tap networking:
qemu-system-riscv64 -nographic -machine virt -kernel bbl-linux-4.15 \
-append "root=/dev/vda ro console=ttyS0" \
-drive file=root.bin,format=raw,id=hd0 \
-device virtio-blk-device,drive=hd0 \
-netdev type=tap,script=qemu-ifup,downscript=qemu-ifdown,id=net0 \
-device virtio-net-device,netdev=net0
Note: this depends on a filesystem in root.bin
as well as qemu-ifup
and qemu-ifdown
scripts for your platform. The invoking user also requires privileges to create the tun/tap device.
Here are instructions for building a busybox+dropbear root image for the virt
machine:
Information on the most recent Fedora images for RISC-V:
Information on the most recent Debian images for RISC-V:
Below are instructions for building riscv-qemu, riscv-linux, and a root filesystem based on buildroot using SiFive's freedom-u-sdk:
Note: When building freedom-u-sdk, make sure to unset the RISCV
environment variable because buildroot needs a specific version of riscv-gnu-toolchain which is included in the freedom-u-sdk.
unset RISCV
git clone --recursive https://github.com/sifive/freedom-u-sdk.git
cd freedom-u-sdk
make qemu
To use SMP support in riscv-linux, you'll need a recent version of riscv-qemu, either riscv-next
or at least the qemu-upstream-v5
branch. You will also need to use the virt
machine which is currently the only machine that allows more than 1 processor (up to 8 processor with the default version of riscv-pk/bbl
).
To build an SMP kernel,checkout riscv-linux and configure with defaults:
git clone --depth 1 --branch riscv-linux-4.15 https://github.com/riscv/riscv-linux.git
cd riscv-linux
make ARCH=riscv defconfig
Note: Shallow clone is used for speed as this only downloads the required objects, not the entire linux history. If you want to be able to switch branches them omit the --depth 1
option from the command line.
Run menuconfig:
git clone https://github.com/riscv/riscv-linux.git
cd riscv-linux
make ARCH=riscv menuconfig
Enable SMP:
- "Platform Type" -> "Symmetric Multi-Processing" =
[*]
Select Compiler:
- "General Setup" -> "Cross-compiler tool prefix" =
riscv64-unknown-elf
Build Linux kernel:
make ARCH=riscv -j$(nproc)
Check out riscv-pk and build:
cd ..
git clone https://github.com/riscv/riscv-pk.git
cd riscv-pk
mkdir build
cd build
../configure --host=riscv64-unknown-elf --with-payload=../../riscv-linux/vmlinux
make
cp bbl ../../qemu-images/bbl-linux-4.15
To enable SMP in QEMU, add -smp cpus=4
to the command line.
This command line invokes the virt
machine with 4 CPUs and a root filesystem in root.bin
:
qemu-system-riscv64 -nographic -machine virt -smp cpus=4 \
-kernel qemu-images/bbl-linux-4.15 \
-append "root=/dev/vda ro" \
-drive file=root.bin,format=raw,id=hd0 \
-device virtio-blk-device,drive=hd0`
SMP has been tested with the following riscv-linux branches.
- https://github.com/riscv/riscv-linux/tree/riscv-linux-4.14
- https://github.com/riscv/riscv-linux/tree/riscv-linux-4.15
This is a list of RISC-V QEMU Port Contributors:
- Alex Suykov
- Andreas Schwab
- Antony Pavlov
- Bastian Koppelmann
- Bruce Hoult
- Chih-Min Chao
- Daire McNamara
- Darius Rad
- David Abdurachmanov
- Hesham Almatary
- Ivan Griffin
- Jim Wilson
- Kito Cheng
- Michael Clark
- Palmer Dabbelt
- Richard Henderson
- Sagar Karandikar
- Shea Levy
- Stefan O'Rear