Added missing 0.80V

src/vreg_and_chip_reset/vreg.rs

@@ -54,6 +54,8 @@ Value on reset: 11"]
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 #[repr(u8)]
 pub enum VSEL_A {
+ #[doc = "5: 0.80V"]
+ VOLTAGE0_80 = 5,
  #[doc = "6: 0.85V"]
  VOLTAGE0_85 = 6,
  #[doc = "7: 0.90V"]
@@ -89,6 +91,7 @@ impl VSEL_R {
  #[inline(always)]
  pub fn variant(&self) -> Option<VSEL_A> {
  match self.bits {
+ 5 => Some(VSEL_A::VOLTAGE0_80),
  6 => Some(VSEL_A::VOLTAGE0_85),
  7 => Some(VSEL_A::VOLTAGE0_90),
  8 => Some(VSEL_A::VOLTAGE0_95),
@@ -102,6 +105,11 @@ impl VSEL_R {
  _ => None,
  }
  }
+ #[doc = "Checks if the value of the field is `VOLTAGE0_80`"]
+ #[inline(always)]
+ pub fn is_voltage0_80(&self) -> bool {
+ *self == VSEL_A::VOLTAGE0_80
+ }
  #[doc = "Checks if the value of the field is `VOLTAGE0_85`"]
  #[inline(always)]
  pub fn is_voltage0_85(&self) -> bool {
@@ -156,6 +164,11 @@ impl VSEL_R {
 #[doc = "Field `VSEL` writer - Output voltage select for on-chip voltage regulator."]
 pub type VSEL_W<'a, const O: u8> = crate::FieldWriter<'a, VREG_SPEC, 4, O, VSEL_A>;
 impl<'a, const O: u8> VSEL_W<'a, O> {
+ #[doc = "0.80V"]
+ #[inline(always)]
+ pub fn voltage0_80(self) -> &'a mut W {
+ self.variant(VSEL_A::VOLTAGE0_80)
+ }
  #[doc = "0.85V"]
  #[inline(always)]
  pub fn voltage0_85(self) -> &'a mut W {

svd/rp2040.svd.patched

@@ -14573,6 +14573,11 @@
  <enumeratedValues>
  <name>VSEL</name>
  <usage>read-write</usage>
+ <enumeratedValue>
+ <name>Voltage0_80</name>
+ <description>0.80V</description>
+ <value>5</value>
+ </enumeratedValue>
  <enumeratedValue>
  <name>Voltage0_85</name>
  <description>0.85V</description>

svd/rp2040.yaml

@@ -651,6 +651,7 @@ VREG_AND_CHIP_RESET:
  description: "Output voltage select for on-chip voltage regulator."
  VSEL:
  _replace_enum:
+ Voltage0_80: [5, "0.80V"]
  Voltage0_85: [6, "0.85V"]
  Voltage0_90: [7, "0.90V"]
  Voltage0_95: [8, "0.95V"]