In case of collision, prioritize riscvi over riscve

rust-embedded · Nov 28, 2024 · ef18149 · ef18149
1 parent 7815cd7
commit ef18149
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Showing 2 changed files with 9 additions and 9 deletions.
diff --git a/riscv-rt/src/asm.rs b/riscv-rt/src/asm.rs
@@ -77,7 +77,7 @@ _abs_start:
 riscv_rt_macros::loop_global_asm!("    li x{}, 0", 1, 10);
 // a0..a2 (x10..x12) skipped
 riscv_rt_macros::loop_global_asm!("    li x{}, 0", 13, 16);
-#[cfg(not(riscve))]
+#[cfg(riscvi)]
 riscv_rt_macros::loop_global_asm!("    li x{}, 0", 16, 32);
 
 // INITIALIZE GLOBAL POINTER, STACK POINTER, AND FRAME POINTER

diff --git a/riscv-rt/src/lib.rs b/riscv-rt/src/lib.rs
@@ -571,16 +571,16 @@ pub struct TrapFrame {
     /// `x7`: temporary register `t2`, used for intermediate values.
     pub t2: usize,
     /// `x28`: temporary register `t3`, used for intermediate values.
-    #[cfg(not(riscve))]
+    #[cfg(riscvi)]
     pub t3: usize,
     /// `x29`: temporary register `t4`, used for intermediate values.
-    #[cfg(not(riscve))]
+    #[cfg(riscvi)]
     pub t4: usize,
     /// `x30`: temporary register `t5`, used for intermediate values.
-    #[cfg(not(riscve))]
+    #[cfg(riscvi)]
     pub t5: usize,
     /// `x31`: temporary register `t6`, used for intermediate values.
-    #[cfg(not(riscve))]
+    #[cfg(riscvi)]
     pub t6: usize,
     /// `x10`: argument register `a0`. Used to pass the first argument to a function.
     pub a0: usize,
@@ -594,15 +594,15 @@ pub struct TrapFrame {
     pub a4: usize,
     /// `x15`: argument register `a5`. Used to pass the sixth argument to a function.
     pub a5: usize,
-    #[cfg(not(riscve))]
+    #[cfg(riscvi)]
     /// `x16`: argument register `a6`. Used to pass the seventh argument to a function.
     pub a6: usize,
-    #[cfg(not(riscve))]
+    #[cfg(riscvi)]
     /// `x17`: argument register `a7`. Used to pass the eighth argument to a function.
     pub a7: usize,
-    #[cfg(all(target_arch = "riscv32", riscve))]
+    #[cfg(all(target_arch = "riscv32", not(riscvi), riscve))]
     _reserved0: usize,
-    #[cfg(all(target_arch = "riscv32", riscve))]
+    #[cfg(all(target_arch = "riscv32", not(riscvi), riscve))]
     _reserved1: usize,
 }