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One example is AVR-based microcontrollers like the atmega328 or atmega2560

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This is my attempt at fixing #352 . Now to fix the ahash crate...

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Amanieu commented Aug 19, 2022

LGTM, but you need to run cargo fmt.

@mutantbob mutantbob changed the title add support for architectures with 16-bit pointer width add support for architectures with 16-bit pointer width Closes #352 Aug 25, 2022
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Closes #352

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Amanieu commented Aug 31, 2022

After thinking about this for a bit, this may not be the right thing to do here. Using a group size that is too small will have a negative impact on workloads which frequently insert & remove elements since it makes it more likely to completely fill a group with tombstones. It might be better to use u32 like the 32-bit architectures here.

Another issue is that AVR (RISC-V too) doesn't support an efficient implementation of u32::trailing_zeros and unaligned memory access which are crucial for the performance of the hash table. This can probably be looked over for now but in the future we may want a different implementation for these architectures.

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Amanieu commented Sep 18, 2022

ping @mutantbob Can you change this PR to use u32 on 16-bit architectures?

bors added a commit that referenced this pull request Oct 18, 2022
Add support for 16-bit targets

Supersedes #353
Fixes #352
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Amanieu commented Oct 18, 2022

Superseded by #368

@Amanieu Amanieu closed this Oct 18, 2022
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