Apply patches for RISC-V 64-bit support#6

Merged

alexcrichton merged 11 commits intorust-lang:rustc/8.0-2019-01-16from Disasm:rustc-pick-min

Feb 12, 2019

+7,693-269

Commits on Feb 10, 2019

[RISCV] Add codegen support for RV64A

asb
authored and
Disasm
committed

Commits on Feb 11, 2019

[RISCV] Quick fix for PR40333

asb
authored and
Disasm
committed
[RISCV][NFC] Change naming scheme for RISC-V specific DAG nodes

asb
authored and
Disasm
committed
[RISCV] Custom-legalise 32-bit variable shifts on RV64

asb
authored and
Disasm
committed
[RISCV] Custom-legalise i32 SDIV/UDIV/UREM on RV64M

asb
authored and
Disasm
committed
[RISCV] Add tests to demonstrate bitcasted fneg/fabs dagcombines

asb
authored and
Disasm
committed
[RISCV][NFC] s/f32/f64 in double-arith.ll

asb
authored and
Disasm
committed
[RISCV] Add another potential combine to {double,float}-bitmanip-dagcombines.ll

asb
authored and
Disasm
committed
[RISCV] Add target DAG combine for bitcast fabs/fneg on RV32FD

asb
authored and
Disasm
committed
[RISCV] Add RV64F codegen support

asb
authored and
Disasm
committed
[RISCV] Implement RV64D codegen

asb
authored and
Disasm
committed