Skip to content
This repository has been archived by the owner on Feb 5, 2019. It is now read-only.

Fix signed multiplication with overflow #79

Merged
merged 1 commit into from
May 19, 2017
Merged

Fix signed multiplication with overflow #79

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3481,11 +3481,11 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
// part.
unsigned LoSize = VT.getSizeInBits();
SDValue HiLHS =
DAG.getNode(ISD::SRA, dl, VT, RHS,
DAG.getNode(ISD::SRA, dl, VT, LHS,
DAG.getConstant(LoSize - 1, dl,
TLI.getPointerTy(DAG.getDataLayout())));
SDValue HiRHS =
DAG.getNode(ISD::SRA, dl, VT, LHS,
DAG.getNode(ISD::SRA, dl, VT, RHS,
DAG.getConstant(LoSize - 1, dl,
TLI.getPointerTy(DAG.getDataLayout())));

Expand Down
16 changes: 16 additions & 0 deletions test/CodeGen/ARM/v6m-smul-with-overflow.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s

define i1 @signed_multiplication_did_overflow(i32, i32) {
; CHECK-LABEL: signed_multiplication_did_overflow:
entry-block:
%2 = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %0, i32 %1)
%3 = extractvalue { i32, i1 } %2, 1
ret i1 %3

; CHECK: mov r2, r1
; CHECK: asrs r1, r0, #31
; CHECK: asrs r3, r2, #31
; CHECK: bl __aeabi_lmul
}

declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32)