"Legacy" tier 2 targets have misplaced or absent maintainer docs #113739

workingjubilee · 2023-07-16T00:23:23Z

Location

This affects our platform support documentation.

It specifically affects targets added before the target tier policy was confirmed, and especially those that are tier 2.

Summary

It is widely expected that the existing tier 1 targets are of primary concern for the Rust Project in general. As I understand it, the current absence of formally documented maintainers for them is based on the belief we have a large enough surplus of "target maintainers" for them that we can expect these targets to be effectively supported by "whoever picks up the slack".

However, tier 2 targets are trickier. Many are more niche, harder to find and run code on, and require specialized developer knowledge. These realities are part of why we expect targets to have target maintainers. Yet we have several without any documented support because they predate the target tier policy. This has recently led to us being forced to respond to exigent circumstances by interrupting our usual support because they implicitly violated the other side of the target support "contract": they impeded development of all the rest of our targets to a degree we cannot accept, with little other recourse.

This is a very bad situation. It is also a bad situation we can attempt to reduce recurrence of. Easily, in fact. Some of our targets have informally known target maintainers but we just... haven't written them down. Actually writing down who is invested in these targets in the same way other maintainers are listed would help reduce the need for guessing when responding in future high-priority situations where failure to act could stall-out work.

We should formally document target maintainers for the following tier 2 targets on the now-common platform support documentation pages. Technically this concern applies somewhat even to tier 3 targets as well but those should be handled in a separate issue as they are quite literally a separate priority level, and because tier 2 targets are unique in having potential to move to both tier 1 and tier 3. We may need to reduce our asserted support level for some of these targets. We also might like to raise our support level for others, without having to maintain our existing assumptions of having essentially infinite "slack" for them.

Tier 2 with Host Tools

Tier 2

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thomcc · 2023-07-16T02:48:36Z

I can volunteer as a maintainer for at least these three.

aarch64-apple-darwin
aarch64-apple-ios
x86_64-apple-ios (which is the x86_64 iOS simulator target, despite the name).

It's worth noting that for many of these there's not a clean place in the documentation to mark a target maintainer.

workingjubilee · 2023-07-16T02:56:16Z

There is definitely a certain degree to which this issue is really about us needing to better organize our documentation and our "search for maintainers" is about finding our !s with our own two hands, given that we do have the ping groups, and the platform support docs, but it's... inconsistent. I started a T-compiler discussion on Zulip about this.

jonathanpallant · 2023-07-20T10:37:35Z

Related to this, I found a weird codegen issue on the thumbv7em-none-eabi and thumbv7em-none-eabihf targets when specifying -C target-cpu=xxx and I don't know who to ask about it.

apiraino · 2023-07-20T15:28:30Z

Issue discussed during weekly T-compiler triage meeting on Zulip (notes). Feels like this topic will need a separate discussion, possibly involving other teams. So, leaving nominated for now to figure that out.

jacobbramley · 2023-07-20T15:39:59Z

From this earlier comment (but continuing it here since that seems more appropriate):

I was under the impression that Arm Ltd were maintaining the thumbv*m-none-eabi* targets.

We (Arm) look at a few issues in that area, for example if we're tagged or if someone points them our way. However, we are not official maintainers of the embedded targets at the moment! That said, we care about them, so will be watching this with interest. Our day-to-day focus is aarch64-unknown-linux-gnu (tier 1), for which I think we are the official maintainers (though I couldn't find a list just now).

RalfJung · 2023-08-31T06:53:32Z

Can confirm -- I'm having some trouble with the sparc64 ABI and I'm not sure whom to ping either.

chrisnc · 2024-03-26T04:23:13Z

I've volunteered to maintain the Armv7-R targets (all four flavors). #110377 #119102
I could contribute to maintaining the Armv*-M targets as well, but I think those have a much bigger constituency and other informal maintainers.

jonathanpallant · 2024-03-28T19:53:55Z

The Embedded Devices WG had a PR cleaning up the docs and adding themselves to the Cortex-M targets, but it got lost. I'll try and open it again.

RalfJung · 2024-06-10T05:32:48Z

Would it be worth making some sort of blogpost, saying that we need people to volunteer as maintainers here and help write the docs for the target support page, or else targets will have to be downgraded to tier 3?

jonathanpallant · 2024-06-11T08:16:31Z

Seems reasonable. I gave all the Cortex-M targets to the EDWG so they can be ticked off.

chrisnc · 2024-06-12T04:56:47Z

The two "armebv7r-none-eabi(hf)? Bare Armv7-R, Big Endian" targets can be checked off as well.

RalfJung · 2024-06-12T05:45:19Z

Seems reasonable. I gave all the Cortex-M targets to the EDWG so they can be ticked off.

There is no target with "cortex-m" in its name or description so I'm afraid I don't know which targets you are talking about.

jonathanpallant · 2024-06-12T09:09:20Z

sigh, yeah, Arm naming is fun.

See https://doc.rust-lang.org/nightly/rustc/platform-support/arm-none-eabi.html - it's not on stable yet
I meant Arm M-Profile Architectures (which are implemented by a series of proprietary CPU cores sold to chip designers under the Arm Cortex-M branding):

RalfJung · 2024-06-12T09:28:28Z

Ah, I see, thanks.

It seems we do have target maintainers listed, but it's an email address, which doesn't work well with our usual github-based workflows. Any chance of having a github handle or notification group to ping?

jonathanpallant · 2024-06-12T10:02:05Z

Paging @adamgreig and @therealprof for that as I'm no longer in the WG.

…unknown-linux-target-page, r=pietroalbini Add target page for riscv64gc-unknown-linux-gnu I was reading rust-lang#113739 and realized I knew most of the information necessary to create the `riscv64gc-unknown-linux-gnu` target page.

Rollup merge of rust-lang#127490 - ferrocene:hoverbear/add-riscv64gc-unknown-linux-target-page, r=pietroalbini Add target page for riscv64gc-unknown-linux-gnu I was reading rust-lang#113739 and realized I knew most of the information necessary to create the `riscv64gc-unknown-linux-gnu` target page.

…inux-target-page, r=pietroalbini Add target page for riscv64gc-unknown-linux-gnu I was reading rust-lang/rust#113739 and realized I knew most of the information necessary to create the `riscv64gc-unknown-linux-gnu` target page.

workingjubilee · 2024-10-29T08:16:04Z

Nice, was able to mark off 15 targets as having any maintainer contacts, and a few more are en route.

rettichschnidi · 2024-10-29T11:24:20Z

Me (my employer) is interested in keeping armv5te-unknown-linux-gnueabi a Tier 2 platform. We should be able to invest resources (time, money), but we do not have any compiler experts. Please ping me if anyone out there is in a similar situation.

RalfJung · 2024-10-30T16:49:36Z

@uweigand mentioned they could be pinged for s390x related questions. @uweigand would you be willing to be listed as target maintainer?

FYI the definition of that role is

A tier 2 target must have a designated team of developers (the "target maintainers") available to consult on target-specific build-breaking issues, or if necessary to develop target-specific language or library implementation details. This team must have at least 2 developers.

Since we currently have 0 maintainers, I think we can make an exception to the "at least 2" rule and allow 1 to be listed (but this wouldn't be enough to get a checkbox in this issue). Maybe you know some people that would also be interested to help? :)

uweigand · 2024-10-30T18:01:30Z

@uweigand mentioned they could be pinged for s390x related questions. @uweigand would you be willing to be listed as target maintainer?

Yes, I'd be happy to take on that role.

FYI the definition of that role is

A tier 2 target must have a designated team of developers (the "target maintainers") available to consult on target-specific build-breaking issues, or if necessary to develop target-specific language or library implementation details. This team must have at least 2 developers.

Since we currently have 0 maintainers, I think we can make an exception to the "at least 2" rule and allow 1 to be listed (but this wouldn't be enough to get a checkbox in this issue). Maybe you know some people that would also be interested to help? :)

I'll ask around.

RalfJung · 2024-10-30T18:04:30Z

Yes, I'd be happy to take on that role.

Awesome. :)

@workingjubilee do you know how the paperwork for that works? :D

workingjubilee · 2024-10-30T21:11:20Z

@uweigand All that's required is to submit a PR adding the target's platform support document and noting that you do in fact assent to be the target maintainer in the PR description. There is a template here: https://github.com/rust-lang/rust/blob/759e07f063fb8e6306ff1bdaeb70af56a878b415/src/doc/rustc/src/platform-support/TEMPLATE.md

Make sure it's linked from the actual platform support page: https://github.com/rust-lang/rust/blob/759e07f063fb8e6306ff1bdaeb70af56a878b415/src/doc/rustc/src/platform-support.md

And listed in the summary: https://github.com/rust-lang/rust/blob/759e07f063fb8e6306ff1bdaeb70af56a878b415/src/doc/rustc/src/SUMMARY.md

uweigand · 2024-11-18T18:46:58Z

@uweigand All that's required is to submit a PR adding the target's platform support document and noting that you do in fact assent to be the target maintainer in the PR description.

I've now opened #133186, thanks!

RalfJung · 2024-12-04T06:40:23Z

According to rust-lang/compiler-team#812, @psumbera has been our "de facto target maintainer" for Solaris targets. @psumbera , would you be okay with documenting that officially, so that when a Solaris issue comes up, compiler team members can find you in the target list and ping you?

Nominally we need a team of 2 target maintainers for tier 2 targets, but given that currently we have 0 listed, having 1 would be a good improvement. :) But if you happen to know anyone else who might be willing to help with this, that'd be even better. :D

EDIT: Ah, the PR at #133293 is already up, great! 🎉

RalfJung · 2024-12-17T11:29:43Z

@Gelbpunkt @famfo @neuschaefer since you are in the process of becoming tier 2 target maintainers for powerpc64le-unknown-linux-musl, I wonder if you know people who are interested in our other powerpc targets? None of them currently have a listed target maintainer, which means they are candidates for eventual demotion to tier 3 if we can't find people who step up to help maintain those targets.

Gelbpunkt · 2024-12-17T16:42:50Z

@Gelbpunkt @famfo @neuschaefer since you are in the process of becoming tier 2 target maintainers for powerpc64le-unknown-linux-musl, I wonder if you know people who are interested in our other powerpc targets? None of them currently have a listed target maintainer, which means they are candidates for eventual demotion to tier 3 if we can't find people who step up to help maintain those targets.

Hey there, the people we know are not working on PowerPC + glibc, but rather also on musl targets (in particular, the Adélie Linux people are the only Linux distro I'm aware of that supports ppc and ppc64, but it uses musl). I'm not aware of anyone using or supporting ppc or ppc64 with glibc. ppc64le on the other hand is supported by a large number of distros, perhaps someone from e.g. Debian, Ubuntu or Fedora would want to step in there? Your best bet in any case is to poke at IBM, they seem to contribute actively to rustc and should have some degree of interest in keeping PowerPC glibc targets in tier 2. Distro support for ppc64le seems to be mostly based around IBM-provided hardware as well.
Sorry for not having someone up my sleeve :( I wish I could be a better help, but the PowerPC / POWER landscape is very small and almost everything related goes through IBM.

RalfJung · 2024-12-17T17:56:12Z

Thanks for the reply!

I don't have contacts at IBM; @uweigand maybe you could help with that?

uweigand · 2024-12-17T18:32:54Z

I don't have contacts at IBM; @uweigand maybe you could help with that?

I'll see what I can find out on the Power side.

workingjubilee added A-docs Area: documentation for any part of the project, including the compiler, standard library, and tools A-target-specs Area: Compile-target specifications C-tracking-issue Category: An issue tracking the progress of sth. like the implementation of an RFC labels Jul 16, 2023

workingjubilee mentioned this issue Jul 16, 2023

Regression when using linker=arm-none-eabi-gcc #113597

Closed

workingjubilee added T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. I-compiler-nominated Nominated for discussion during a compiler team meeting. labels Jul 16, 2023

workingjubilee mentioned this issue Jul 16, 2023

Directly link more target docs #113743

Merged

davidtwco mentioned this issue Aug 4, 2023

Tier 2 Targets Review rust-lang/compiler-team#660

Open

apiraino removed the I-compiler-nominated Nominated for discussion during a compiler team meeting. label Aug 10, 2023

davidtwco mentioned this issue Sep 20, 2023

target tier policy compliance #116004

Closed

ehuss mentioned this issue Oct 26, 2023

Document tier 3 platform support rust-lang/rust-forge#255

Closed

41 tasks

briansmith mentioned this issue May 23, 2024

Fails to build on SPARC64 briansmith/ring#1512

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RalfJung mentioned this issue Jun 10, 2024

add some ice tests 5xxxx to 9xxxx #122895

Merged

Hoverbear mentioned this issue Jul 8, 2024

Add target page for riscv64gc-unknown-linux-gnu #127490

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RalfJung mentioned this issue Oct 30, 2024

Stabilize s390x inline assembly #131258

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uweigand mentioned this issue Nov 18, 2024

Document s390x-unknown-linux targets #133186

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RalfJung mentioned this issue Dec 16, 2024

aarch64-unknown-none-softfloat: ABI unsoundness when enabling "neon" feature #134375

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"Legacy" tier 2 targets have misplaced or absent maintainer docs #113739

"Legacy" tier 2 targets have misplaced or absent maintainer docs #113739

workingjubilee commented Jul 16, 2023 •

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"Legacy" tier 2 targets have misplaced or absent maintainer docs #113739

"Legacy" tier 2 targets have misplaced or absent maintainer docs #113739

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workingjubilee commented Jul 16, 2023 • edited by tgross35 Loading

Location

Summary

Tier 2 with Host Tools

Tier 2

thomcc commented Jul 16, 2023

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