How should we handle dynamic vector ABIs? #133146
Labels
A-ABI
Area: Concerning the application binary interface (ABI)
A-SIMD
Area: SIMD (Single Instruction Multiple Data)
C-discussion
Category: Discussion or questions that doesn't represent real issues.
E-needs-design
This issue needs exploration and design to see how and if we can fix/implement it
O-AArch64
Armv8-A or later processors in AArch64 mode
O-riscv
Target: RISC-V architecture
T-compiler
Relevant to the compiler team, which will review and decide on the PR/issue.
The primary unresolved question of #131800 I would say is this edge-case. Opening this marker issue for now, I will explain a bit later but basically: we understand most of the factors here but we need to account for what we actually want to do.
AArch64
RISCV
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