Miscompile at -Copt-level=1

[saethlin]

I think this is an LLVM SROA bug, it reproduces with -Cno-prepopulate-passes -Cpasses=sroa.

I'm running out of ideas for how to minimize this. Maybe it's minimal?

#![feature(custom_mir, core_intrinsics)]
extern crate core;
use core::intrinsics::mir::*;
#[inline(never)]
fn opaque<T>(t: T) {std::hint::black_box(t);}
#[inline(never)]
#[custom_mir(dialect = "runtime", phase = "initial")]
pub fn fn0() -> ([u8; 1], u32) {
    mir! {
        let _1: (([u8; 1], u32), [u8; 5]);
        let _2: ();
        {
            _1.0.0 = [0];
            _1.0.1 = 2;
            _1.1 = [0, 0, 0, 0, 0];
            Call(RET = fn1(_1.0, _1.0, _1), ReturnTo(bb2), UnwindUnreachable())
        }
        bb2 = {
            Call(_2 = opaque(Move(_1)), ReturnTo(bb3), UnwindUnreachable())
        }
        bb3 = {
            Return()
        }
    }
}
#[inline(never)]
#[custom_mir(dialect = "runtime", phase = "initial")]
fn fn1(
    mut _1: ([u8; 1], u32),
    mut _2: ([u8; 1], u32),
    mut _3: (([u8; 1], u32), [u8; 5]),
) -> ([u8; 1], u32) {
    mir! {
        let _4: ();
        {
            _1 = (_3.0.0, 0);
            _3.0 = _1;
            RET = _1;
            Call(_4 = opaque(_2.1), ReturnTo(bb6), UnwindUnreachable())
        }
        bb6 = {
            Call(_4 = opaque(Move(_3)), ReturnTo(bb7), UnwindUnreachable())
        }
        bb7 = {
            Return()
        }
    }
}

fn main() {
    println!("{:?}", fn0());
}

Miri prints:

([0], 0)

rustc -Copt-level=1 -Zmir-opt-level=0 prints:

([0], 2)

[pitust]

This appears to be an isel bug: it does not show up with -Copt-level=0 (even when SROA is enabled) or with -Cllvm-args=--global-isel, or on AArch64. I think I also hit similar isel wonkyness around undef at some point, so it would not be particularly surprising to find out that X86 isel is broken in this scenario as well...

[dianqk]

Reduced: https://rust.godbolt.org/z/G7n9vT6ve.
For the following LLVM IR, the first instruction should be movl %edi, %eax. https://llvm.godbolt.org/z/afP7xcMP7

define i64 @fn1(i64 %arg, ptr %arg1) {
  %i = trunc i64 %arg to i32
  %i4 = load i8, ptr %arg1
  %i5 = zext i8 %i4 to i32
  %i6 = and i32 %i, -256
  %i7 = or i32 %i6, %i5
  %i12 = zext i32 %i7 to i64
  ret i64 %i12
}

I expected llvm/llvm-project#168353 to fix this, but it did not.

[dianqk]

Upstream issue: llvm/llvm-project#169996.