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Description
I'm working on a dual platform embedded project. One is running an ARMv7 processor, and one is running on ARMv6 (RPI1 B+).
The ARMv7 platform runs without issue, however, trying to get ARMv6 code generated has caused problems.
When running the binary on the ARMv6 target, I fail with an illegal instruction.
Tracing on it reveals cbz r3, 0x7f55a264
, a compare and branch on 0... an ARMv7 instruction, absent from the ARMv6 instruction set.
Here is my target in the cargo config:
linker = "arm-linux-gnueabihf-gcc"
rustflags = [
#"-Ctarget-cpu=generic",
"-Ctarget-feature=+armv6",
"-Clink-args=-march=armv6"
]
The broadcom SOC isn't an available target-cpu (oddly, all the cpus in the target list are armv7 processors), so I tried generic, I've tried enabling the armv6 feature and disabling a handful of armv7 features, but had no luck. I've passed args to the linker to ensure the target arch is indeed armv6 as far as it's concerned, but armv7 instructions are still getting through.
I've tried a couple options, but the supported targets list at https://forge.rust-lang.org/platform-support.html
arm-unknown-linux-gnueabihf | ✓ | ✓ | ✓ | ARMv6 Linux, hardfloat
is misleading.
Is there a way to disable all target-features except the ones you explicitly enable? That might be a possible workaround for the time being.