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Support Intel IceLake ISAs through target_feature #67329

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elalfer opened this issue Dec 15, 2019 · 3 comments
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Support Intel IceLake ISAs through target_feature #67329

elalfer opened this issue Dec 15, 2019 · 3 comments
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A-SIMD Area: SIMD (Single Instruction Multiple Data) C-feature-request Category: A feature request, i.e: not implemented / a PR. O-x86_64 Target: x86-64 processors (like x86_64-*) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.

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@elalfer
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elalfer commented Dec 15, 2019

Working on CPUID based dispatch for Vector AES code for https://crates.io/crates/crypto_pimitives library.

Based on https://doc.rust-lang.org/reference/attributes/codegen.html#x86-or-x86_64 Rust doesn't support any AVX512 targets.
@JohnTitor JohnTitor added the C-feature-request Category: A feature request, i.e: not implemented / a PR. label Jan 19, 2020
@jonas-schievink jonas-schievink added O-x86_64 Target: x86-64 processors (like x86_64-*) A-SIMD Area: SIMD (Single Instruction Multiple Data) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Feb 6, 2020
@workingjubilee
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workingjubilee commented Sep 18, 2020 •
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The reference is outdated only concerned with stable here, there is partial AVX512 support in core::arch and the compiler on nightly, as can be seen here: https://doc.rust-lang.org/core/arch/x86_64/index.html

As there is quite a lot to support it has not been finished (nor stabilized) however: rust-lang/stdarch#310
So I believe it does not yet include the specifics of the AVX512 VAES extension you want, either.

@DevJPM
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DevJPM commented Oct 18, 2020 •
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I have looked into implementing this (for nightly at least over on rust-lang/stdarch) however it appears that support is blocked by the compiler not being willing to accept the VAES (and vaguely related VPCLMULQDQ) feature flags for enabling the relevant LLVM intrinsics. And I would be willing to make a PR for the compiler to add that flag, but I'm not sure if there's more to it than "just" adding the "vaes" string here and here. Though the feature seems to be supported in std::detect already though it is named avx512vaes there.

@DevJPM DevJPM mentioned this issue Oct 25, 2020
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m-ou-se added a commit to m-ou-se/rust that referenced this issue Nov 18, 2020
@m-ou-se
Rollup merge of rust-lang#78361 - DevJPM:master, r=workingjubilee
db8ad67 
Updated the list of white-listed target features for x86

This PR both adds in-source documentation on what to look out for when adding a new (X86) feature set and [adds all that are detectable at run-time in Rust stable as of 1.27.0](https://github.com/rust-lang/stdarch/blob/master/crates/std_detect/src/detect/arch/x86.rs).

This should only enable the use of the corresponding LLVM intrinsics.
Actual intrinsics need to be added separately in rust-lang/stdarch.

It also re-orders the run-time-detect test statements to be more consistent
with the actual list of intrinsics whitelisted and removes underscores not present
in the actual names (which might be mistaken as being part of the name)

The reference for LLVM's feature names used is [this file](https://github.com/llvm/llvm-project/blob/master/llvm/include/llvm/Support/X86TargetParser.def).

This PR was motivated as the compiler end's part for allowing rust-lang#67329 to be adressed over on rust-lang/stdarch
m-ou-se added a commit to m-ou-se/rust that referenced this issue Nov 18, 2020
@m-ou-se
Rollup merge of rust-lang#78361 - DevJPM:master, r=workingjubilee
c7e9029 
Updated the list of white-listed target features for x86

This PR both adds in-source documentation on what to look out for when adding a new (X86) feature set and [adds all that are detectable at run-time in Rust stable as of 1.27.0](https://github.com/rust-lang/stdarch/blob/master/crates/std_detect/src/detect/arch/x86.rs).

This should only enable the use of the corresponding LLVM intrinsics.
Actual intrinsics need to be added separately in rust-lang/stdarch.

It also re-orders the run-time-detect test statements to be more consistent
with the actual list of intrinsics whitelisted and removes underscores not present
in the actual names (which might be mistaken as being part of the name)

The reference for LLVM's feature names used is [this file](https://github.com/llvm/llvm-project/blob/master/llvm/include/llvm/Support/X86TargetParser.def).

This PR was motivated as the compiler end's part for allowing rust-lang#67329 to be adressed over on rust-lang/stdarch
@workingjubilee
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workingjubilee commented Apr 29, 2021 •
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In #78361, a large amount of support for AVX512 features was added to the compiler, including all the ones (afaict) that IceLake included, resolving this issue for the Rust compiler, and many intrinsics have been added to std::arch since.

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A-SIMD Area: SIMD (Single Instruction Multiple Data) C-feature-request Category: A feature request, i.e: not implemented / a PR. O-x86_64 Target: x86-64 processors (like x86_64-*) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
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@jonas-schievink @DevJPM @elalfer @JohnTitor @workingjubilee