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Rollup of 7 pull requests #125732

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merged 21 commits into from
May 29, 2024
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40f0172
Add -Zfixed-x18
Darksonn May 3, 2024
518becf
Fail on non-aarch64 targets
Darksonn May 14, 2024
b780fa9
Use an error struct instead of a panic
Darksonn May 15, 2024
0ce51f5
Remove fixed_x18.aarch64.stderr
Darksonn May 15, 2024
7677ff2
Remove aarch64 from revisions list
Darksonn May 15, 2024
448d63e
Tweak various coverage test files for slightly nicer formatting
Zalathar May 29, 2024
9dc6e08
Manually run `x fmt` on all source files in `tests/coverage/`
Zalathar May 29, 2024
bcfefe1
Reintroduce name resolution check for trying to access locals from an…
oli-obk May 29, 2024
eafe80f
tier 3 target policy: clarify the point about producing assembly
RalfJung May 29, 2024
7845c6e
coverage: Avoid overflow when the MC/DC condition limit is exceeded
Zalathar May 29, 2024
34a1828
coverage: Add tests for the MC/DC condition limit
Zalathar May 1, 2024
bb865cb
remove unneeded extern crate in rmake test
lqd May 29, 2024
268b9a7
Extract coverage-specific code out of `compiletest::runtest`
Zalathar May 29, 2024
4aafecb
Simplify check for unsupported architectures
Darksonn May 29, 2024
d0311c1
Rollup merge of #124655 - Darksonn:fixed-x18, r=lqd,estebank
matthiaskrgr May 29, 2024
a7a2fa5
Rollup merge of #125693 - Zalathar:format, r=lqd
matthiaskrgr May 29, 2024
9a61146
Rollup merge of #125700 - Zalathar:limit-overflow, r=nnethercote
matthiaskrgr May 29, 2024
c09b89e
Rollup merge of #125705 - oli-obk:const_block_ice, r=compiler-errors
matthiaskrgr May 29, 2024
a6a819c
Rollup merge of #125708 - RalfJung:tier3, r=compiler-errors
matthiaskrgr May 29, 2024
e4ec56a
Rollup merge of #125715 - lqd:rmake-cleanup, r=jieyouxu
matthiaskrgr May 29, 2024
6ef3dd0
Rollup merge of #125719 - Zalathar:run-coverage, r=jieyouxu
matthiaskrgr May 29, 2024
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2 changes: 2 additions & 0 deletions compiler/rustc_codegen_llvm/messages.ftl
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,8 @@ codegen_llvm_error_creating_import_library =
codegen_llvm_error_writing_def_file =
Error writing .DEF file: {$error}

codegen_llvm_fixed_x18_invalid_arch = the `-Zfixed-x18` flag is not supported on the `{$arch}` architecture

codegen_llvm_from_llvm_diag = {$message}

codegen_llvm_from_llvm_optimization_diag = {$filename}:{$line}:{$column} {$pass_name} ({$kind}): {$message}
Expand Down
6 changes: 6 additions & 0 deletions compiler/rustc_codegen_llvm/src/errors.rs
Original file line number Diff line number Diff line change
Expand Up @@ -254,3 +254,9 @@ pub struct MismatchedDataLayout<'a> {
pub(crate) struct InvalidTargetFeaturePrefix<'a> {
pub feature: &'a str,
}

#[derive(Diagnostic)]
#[diag(codegen_llvm_fixed_x18_invalid_arch)]
pub(crate) struct FixedX18InvalidArch<'a> {
pub arch: &'a str,
}
11 changes: 10 additions & 1 deletion compiler/rustc_codegen_llvm/src/llvm_util.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use crate::back::write::create_informational_target_machine;
use crate::errors::{
InvalidTargetFeaturePrefix, PossibleFeature, TargetFeatureDisableOrEnable,
FixedX18InvalidArch, InvalidTargetFeaturePrefix, PossibleFeature, TargetFeatureDisableOrEnable,
UnknownCTargetFeature, UnknownCTargetFeaturePrefix, UnstableCTargetFeature,
};
use crate::llvm;
Expand Down Expand Up @@ -615,6 +615,15 @@ pub(crate) fn global_llvm_features(sess: &Session, diagnostics: bool) -> Vec<Str
.flatten();
features.extend(feats);

// -Zfixed-x18
if sess.opts.unstable_opts.fixed_x18 {
if sess.target.arch != "aarch64" {
sess.dcx().emit_fatal(FixedX18InvalidArch { arch: &sess.target.arch });
} else {
features.push("+reserve-x18".into());
}
}

if diagnostics && let Some(f) = check_tied_features(sess, &featsmap) {
sess.dcx().emit_err(TargetFeatureDisableOrEnable {
features: f,
Expand Down
1 change: 1 addition & 0 deletions compiler/rustc_interface/src/tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -773,6 +773,7 @@ fn test_unstable_options_tracking_hash() {
tracked!(emit_thin_lto, false);
tracked!(export_executable_symbols, true);
tracked!(fewer_names, Some(true));
tracked!(fixed_x18, true);
tracked!(flatten_format_args, false);
tracked!(force_unstable_if_unmarked, true);
tracked!(fuel, Some(("abc".to_string(), 99)));
Expand Down
5 changes: 3 additions & 2 deletions compiler/rustc_mir_build/src/build/coverageinfo/mcdc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -217,12 +217,13 @@ impl MCDCInfoBuilder {
}
_ => {
// Do not generate mcdc mappings and statements for decisions with too many conditions.
let rebase_idx = self.branch_spans.len() - decision.conditions_num + 1;
// Therefore, first erase the condition info of the (N-1) previous branch spans.
let rebase_idx = self.branch_spans.len() - (decision.conditions_num - 1);
for branch in &mut self.branch_spans[rebase_idx..] {
branch.condition_info = None;
}

// ConditionInfo of this branch shall also be reset.
// Then, erase this last branch span's info too, for a total of N.
condition_info = None;

tcx.dcx().emit_warn(MCDCExceedsConditionNumLimit {
Expand Down
5 changes: 5 additions & 0 deletions compiler/rustc_resolve/src/late.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4505,6 +4505,11 @@ impl<'a: 'ast, 'b, 'ast, 'tcx> LateResolutionVisitor<'a, 'b, 'ast, 'tcx> {
self.visit_expr(elem);
self.resolve_anon_const(ct, AnonConstKind::ConstArg(IsRepeatExpr::Yes));
}
ExprKind::ConstBlock(ref expr) => {
self.resolve_anon_const_manual(false, AnonConstKind::InlineConst, |this| {
this.visit_expr(expr)
});
}
ExprKind::Index(ref elem, ref idx, _) => {
self.resolve_expr(elem, Some(expr));
self.visit_expr(idx);
Expand Down
2 changes: 2 additions & 0 deletions compiler/rustc_session/src/options.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1678,6 +1678,8 @@ options! {
fewer_names: Option<bool> = (None, parse_opt_bool, [TRACKED],
"reduce memory use by retaining fewer names within compilation artifacts (LLVM-IR) \
(default: no)"),
fixed_x18: bool = (false, parse_bool, [TRACKED],
"make the x18 register reserved on AArch64 (default: no)"),
flatten_format_args: bool = (true, parse_bool, [TRACKED],
"flatten nested format_args!() and literals into a simplified format_args!() call \
(default: yes)"),
Expand Down
3 changes: 2 additions & 1 deletion src/doc/rustc/src/target-tier-policy.md
Original file line number Diff line number Diff line change
Expand Up @@ -247,7 +247,8 @@ approved by the appropriate team for that shared code before acceptance.
target may not have; use conditional compilation or runtime detection, as
appropriate, to let each target run code supported by that target.
- Tier 3 targets must be able to produce assembly using at least one of
rustc's supported backends from any host target.
rustc's supported backends from any host target. (Having support in a fork
of the backend is not sufficient, it must be upstream.)

If a tier 3 target stops meeting these requirements, or the target maintainers
no longer have interest or time, or the target shows no signs of activity and
Expand Down
32 changes: 32 additions & 0 deletions src/doc/unstable-book/src/compiler-flags/fixed-x18.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,32 @@
# `fixed-x18`

This option prevents the compiler from using the x18 register. It is only
supported on aarch64.

From the [ABI spec][arm-abi]:

> X18 is the platform register and is reserved for the use of platform ABIs.
> This is an additional temporary register on platforms that don't assign a
> special meaning to it.

This flag only has an effect when the x18 register would otherwise be considered
a temporary register. When the flag is applied, x18 is always a reserved
register.

This flag is intended for use with the shadow call stack sanitizer. Generally,
when that sanitizer is enabled, the x18 register is used to store a pointer to
the shadow stack. Enabling this flag prevents the compiler from overwriting the
shadow stack pointer with temporary data, which is necessary for the sanitizer
to work correctly.

Currently, the `-Zsanitizer=shadow-call-stack` flag is only supported on
platforms that always treat x18 as a reserved register, and the `-Zfixed-x18`
flag is not required to use the sanitizer on such platforms. However, the
sanitizer may be supported on targets where this is not the case in the future.

It is undefined behavior for `-Zsanitizer=shadow-call-stack` code to call into
code where x18 is a temporary register. On the other hand, when you are *not*
using the shadow call stack sanitizer, compilation units compiled with and
without the `-Zfixed-x18` flag are compatible with each other.

[arm-abi]: https://developer.arm.com/documentation/den0024/a/The-ABI-for-ARM-64-bit-Architecture/Register-use-in-the-AArch64-Procedure-Call-Standard/Parameters-in-general-purpose-registers
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