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experiment: Use llvm.dbg.value instead of llvm.dbg.declare when possible. #68902
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r? @davidtwco (rust_highfive has picked a reviewer for you, use r? to override) |
@bors try @rust-timer queue |
Awaiting bors try build completion |
⌛ Trying commit a136ea9e1eee25e203bb13192ea37d642bd7860d with merge 5d7a748ff0f0aa50fc38ab43f0898ee7c523d03b... |
The job Click to expand the log.
I'm a bot! I can only do what humans tell me to, so if this was not helpful or you have suggestions for improvements, please ping or otherwise contact |
(test failures are expected, the inline asm hack is far from foolproof) |
☀️ Try build successful - checks-azure |
Queued 5d7a748ff0f0aa50fc38ab43f0898ee7c523d03b with parent 442ae7f, future comparison URL. |
Finished benchmarking try commit 5d7a748ff0f0aa50fc38ab43f0898ee7c523d03b, comparison URL. |
Amazing, I wonder if that's from |
Now without disabling FastISel: |
Awaiting bors try build completion |
⌛ Trying commit 7f18cf7 with merge d091e27bdf99fc22f4cd9b6df16078d7498e7859... |
The job Click to expand the log.
I'm a bot! I can only do what humans tell me to, so if this was not helpful or you have suggestions for improvements, please ping or otherwise contact |
☀️ Try build successful - checks-azure |
Queued d091e27bdf99fc22f4cd9b6df16078d7498e7859 with parent a29424a, future comparison URL. |
Doesn't appear to be a win, probably because inline |
This is an almost-worst-case approach to #68817 (see the last commit which uses inline assembly).
I'm opening this PR for two reasons: