Add support for MIPS VZ ISA extension

[jam1garner]

Link to relevant LLVM line where virt extension is specified

This has been tested on mips-unknown-linux-musl with a target-cpu that is >= MIPS32 5 and target-features=+virt. The example was checked in a disassembler to ensure the correct assembly sequence was being generated using the virtualization instructions.

Needed additional work:

• MIPS is missing from the Rust reference CPU feature lists

Example docs for later:

#### `mips` or `mips64`

This platform requires that `#[target_feature]` is only applied to [`unsafe`
functions][unsafe function]. This target's feature support is currently unstable
and must be enabled by `#![feature(mips_target_feature)]` ([Issue #44839])

[Issue #44839]: https://github.com/rust-lang/rust/issues/44839

Further documentation on these features can be found in the [MIPS Instruction Set
Reference Manual], or elsewhere on [mips.com].

[MIPS Instruction Set Reference Manual]: https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00086-2B-MIPS32BIS-AFP-6.06.pdf
[developer.arm.com]: https://www.mips.com/products/architectures/ase/

Feature        | Implicitly Enables | Description
---------------|--------------------|-------------------
`fp64`         |                    | 64-bit Floating Point
`msa`          |                    | "MIPS SIMD Architecture"
`virt`         |                    | Virtualization instructions (VZ ASE)

If the above is good I can also submit a PR for that if there's interest in documenting it while it's still unstable. Otherwise that can be dropped, I just wrote it before realizing it was possibly not a good idea.

Relevant to #44839

[rust-highfive]

r? @estebank

(rust-highfive has picked a reviewer for you, use r? to override)

[pnkfelix]

@rustbot reroll

[apiraino]

r? rust-lang/compiler

[pnkfelix]

r? rust-lang/compiler

[oli-obk]

r? @nagisa (looks like you know what's up from the linked issue)

[nagisa]

This would benefit from a test of some sort verifying that virt is in fact an accepted feature name, etc. You mentioned verifying certain instruction sequences, so if there is a trivial test that could be encoded as a codegen/assembly test, that would be awesome, although not required.

r=me even if you decide to not pursue adding any tests.

[nagisa]

@bors r+

[bors]

📌 Commit bec3a54 has been approved by nagisa

It is now in the queue for this repository.

[bors]

⌛ Testing commit bec3a54 with merge c97922d...

[bors]

☀️ Test successful - checks-actions
Approved by: nagisa
Pushing c97922d to master...

[rust-timer]

Finished benchmarking commit (c97922d): comparison URL.

Overall result: ✅ improvements - no action needed

@rustbot label: -perf-regression

Instruction count

This is a highly reliable metric that was used to determine the overall result at the top of this comment.

	mean1	range	count2
Regressions ❌ (primary)	-	-	0
Regressions ❌ (secondary)	-	-	0
Improvements ✅ (primary)	-	-	0
Improvements ✅ (secondary)	-2.3%	[-2.3%, -2.3%]	1
All ❌✅ (primary)	-	-	0

Max RSS (memory usage)

This benchmark run did not return any relevant results for this metric.

Cycles

Results

This is a less reliable metric that may be of interest but was not used to determine the overall result at the top of this comment.

	mean1	range	count2
Regressions ❌ (primary)	-	-	0
Regressions ❌ (secondary)	2.9%	[2.1%, 3.8%]	6
Improvements ✅ (primary)	-	-	0
Improvements ✅ (secondary)	-6.5%	[-6.5%, -6.5%]	1
All ❌✅ (primary)	-	-	0

Footnotes

1. the arithmetic mean of the percent change ↩ ↩²

2. number of relevant changes ↩ ↩²