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Refactor avx512bw: reduction operations
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@TDecking @Amanieu
TDecking authored and Amanieu committed Jul 6, 2024
1 parent 5343e46 commit 09215ac
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68 changes: 0 additions & 68 deletions crates/core_arch/missing-x86.md
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* [ ] [`_tile_zero`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_tile_zero)
</p></details>

<details><summary>["AVX512BW", "AVX512VL"]</summary><p>

* [ ] [`_mm256_mask_reduce_add_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_add_epi16)
* [ ] [`_mm256_mask_reduce_add_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_add_epi8)
* [ ] [`_mm256_mask_reduce_and_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_and_epi16)
* [ ] [`_mm256_mask_reduce_and_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_and_epi8)
* [ ] [`_mm256_mask_reduce_max_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_max_epi16)
* [ ] [`_mm256_mask_reduce_max_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_max_epi8)
* [ ] [`_mm256_mask_reduce_max_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_max_epu16)
* [ ] [`_mm256_mask_reduce_max_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_max_epu8)
* [ ] [`_mm256_mask_reduce_min_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_min_epi16)
* [ ] [`_mm256_mask_reduce_min_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_min_epi8)
* [ ] [`_mm256_mask_reduce_min_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_min_epu16)
* [ ] [`_mm256_mask_reduce_min_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_min_epu8)
* [ ] [`_mm256_mask_reduce_mul_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_mul_epi16)
* [ ] [`_mm256_mask_reduce_mul_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_mul_epi8)
* [ ] [`_mm256_mask_reduce_or_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_or_epi16)
* [ ] [`_mm256_mask_reduce_or_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_reduce_or_epi8)
* [ ] [`_mm256_reduce_add_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_add_epi16)
* [ ] [`_mm256_reduce_add_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_add_epi8)
* [ ] [`_mm256_reduce_and_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_and_epi16)
* [ ] [`_mm256_reduce_and_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_and_epi8)
* [ ] [`_mm256_reduce_max_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_max_epi16)
* [ ] [`_mm256_reduce_max_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_max_epi8)
* [ ] [`_mm256_reduce_max_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_max_epu16)
* [ ] [`_mm256_reduce_max_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_max_epu8)
* [ ] [`_mm256_reduce_min_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_min_epi16)
* [ ] [`_mm256_reduce_min_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_min_epi8)
* [ ] [`_mm256_reduce_min_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_min_epu16)
* [ ] [`_mm256_reduce_min_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_min_epu8)
* [ ] [`_mm256_reduce_mul_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_mul_epi16)
* [ ] [`_mm256_reduce_mul_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_mul_epi8)
* [ ] [`_mm256_reduce_or_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_or_epi16)
* [ ] [`_mm256_reduce_or_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_reduce_or_epi8)
* [ ] [`_mm_mask_reduce_add_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_add_epi16)
* [ ] [`_mm_mask_reduce_add_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_add_epi8)
* [ ] [`_mm_mask_reduce_and_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_and_epi16)
* [ ] [`_mm_mask_reduce_and_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_and_epi8)
* [ ] [`_mm_mask_reduce_max_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_max_epi16)
* [ ] [`_mm_mask_reduce_max_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_max_epi8)
* [ ] [`_mm_mask_reduce_max_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_max_epu16)
* [ ] [`_mm_mask_reduce_max_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_max_epu8)
* [ ] [`_mm_mask_reduce_min_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_min_epi16)
* [ ] [`_mm_mask_reduce_min_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_min_epi8)
* [ ] [`_mm_mask_reduce_min_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_min_epu16)
* [ ] [`_mm_mask_reduce_min_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_min_epu8)
* [ ] [`_mm_mask_reduce_mul_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_mul_epi16)
* [ ] [`_mm_mask_reduce_mul_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_mul_epi8)
* [ ] [`_mm_mask_reduce_or_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_or_epi16)
* [ ] [`_mm_mask_reduce_or_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_reduce_or_epi8)
* [ ] [`_mm_reduce_add_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_add_epi16)
* [ ] [`_mm_reduce_add_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_add_epi8)
* [ ] [`_mm_reduce_and_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_and_epi16)
* [ ] [`_mm_reduce_and_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_and_epi8)
* [ ] [`_mm_reduce_max_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_max_epi16)
* [ ] [`_mm_reduce_max_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_max_epi8)
* [ ] [`_mm_reduce_max_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_max_epu16)
* [ ] [`_mm_reduce_max_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_max_epu8)
* [ ] [`_mm_reduce_min_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_min_epi16)
* [ ] [`_mm_reduce_min_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_min_epi8)
* [ ] [`_mm_reduce_min_epu16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_min_epu16)
* [ ] [`_mm_reduce_min_epu8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_min_epu8)
* [ ] [`_mm_reduce_mul_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_mul_epi16)
* [ ] [`_mm_reduce_mul_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_mul_epi8)
* [ ] [`_mm_reduce_or_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_or_epi16)
* [ ] [`_mm_reduce_or_epi8`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_reduce_or_epi8)
</p></details>


<details><summary>["AVX512_FP16"]</summary><p>

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