add vldx neon instructions

crates/core_arch/src/aarch64/crc.rs

@@ -1,4 +1,4 @@
-extern "C" {
+extern "unadjusted" {
     #[link_name = "llvm.aarch64.crc32x"]
     fn crc32x_(crc: u32, data: u64) -> u32;
 

crates/core_arch/src/aarch64/neon/mod.rs

@@ -25,48 +25,38 @@ types! {
     pub struct float64x2_t(f64, f64);
 }
 
-/// ARM-specific type containing two `int8x16_t` vectors.
+/// ARM-specific type containing two `float64x1_t` vectors.
 #[derive(Copy, Clone)]
-pub struct int8x16x2_t(pub int8x16_t, pub int8x16_t);
-/// ARM-specific type containing three `int8x16_t` vectors.
+pub struct float64x1x2_t(pub float64x1_t, pub float64x1_t);
+/// ARM-specific type containing three `float64x1_t` vectors.
 #[derive(Copy, Clone)]
-pub struct int8x16x3_t(pub int8x16_t, pub int8x16_t, pub int8x16_t);
-/// ARM-specific type containing four `int8x16_t` vectors.
+pub struct float64x1x3_t(pub float64x1_t, pub float64x1_t, pub float64x1_t);
+/// ARM-specific type containing four `float64x1_t` vectors.
 #[derive(Copy, Clone)]
-pub struct int8x16x4_t(pub int8x16_t, pub int8x16_t, pub int8x16_t, pub int8x16_t);
-
-/// ARM-specific type containing two `uint8x16_t` vectors.
-#[derive(Copy, Clone)]
-pub struct uint8x16x2_t(pub uint8x16_t, pub uint8x16_t);
-/// ARM-specific type containing three `uint8x16_t` vectors.
-#[derive(Copy, Clone)]
-pub struct uint8x16x3_t(pub uint8x16_t, pub uint8x16_t, pub uint8x16_t);
-/// ARM-specific type containing four `uint8x16_t` vectors.
-#[derive(Copy, Clone)]
-pub struct uint8x16x4_t(
-    pub uint8x16_t,
-    pub uint8x16_t,
-    pub uint8x16_t,
-    pub uint8x16_t,
+pub struct float64x1x4_t(
+    pub float64x1_t,
+    pub float64x1_t,
+    pub float64x1_t,
+    pub float64x1_t,
 );
 
-/// ARM-specific type containing two `poly8x16_t` vectors.
+/// ARM-specific type containing two `float64x2_t` vectors.
 #[derive(Copy, Clone)]
-pub struct poly8x16x2_t(pub poly8x16_t, pub poly8x16_t);
-/// ARM-specific type containing three `poly8x16_t` vectors.
+pub struct float64x2x2_t(pub float64x2_t, pub float64x2_t);
+/// ARM-specific type containing three `float64x2_t` vectors.
 #[derive(Copy, Clone)]
-pub struct poly8x16x3_t(pub poly8x16_t, pub poly8x16_t, pub poly8x16_t);
-/// ARM-specific type containing four `poly8x16_t` vectors.
+pub struct float64x2x3_t(pub float64x2_t, pub float64x2_t, pub float64x2_t);
+/// ARM-specific type containing four `float64x2_t` vectors.
 #[derive(Copy, Clone)]
-pub struct poly8x16x4_t(
-    pub poly8x16_t,
-    pub poly8x16_t,
-    pub poly8x16_t,
-    pub poly8x16_t,
+pub struct float64x2x4_t(
+    pub float64x2_t,
+    pub float64x2_t,
+    pub float64x2_t,
+    pub float64x2_t,
 );
 
 #[allow(improper_ctypes)]
-extern "C" {
+extern "unadjusted" {
     // absolute value
     #[link_name = "llvm.aarch64.neon.abs.i64"]
     fn vabsd_s64_(a: i64) -> i64;

crates/core_arch/src/aarch64/prefetch.rs

@@ -1,7 +1,7 @@
 #[cfg(test)]
 use stdarch_test::assert_instr;
 
-extern "C" {
+extern "unadjusted" {
     #[link_name = "llvm.prefetch"]
     fn prefetch(p: *const i8, rw: i32, loc: i32, ty: i32);
 }

crates/core_arch/src/aarch64/tme.rs

@@ -17,7 +17,7 @@
 #[cfg(test)]
 use stdarch_test::assert_instr;
 
-extern "C" {
+extern "unadjusted" {
     #[link_name = "llvm.aarch64.tstart"]
     fn aarch64_tstart() -> u64;
     #[link_name = "llvm.aarch64.tcommit"]

crates/core_arch/src/arm/dsp.rs

@@ -32,7 +32,7 @@ types! {
     pub struct uint16x2_t(u16, u16);
 }
 
-extern "C" {
+extern "unadjusted" {
     #[link_name = "llvm.arm.smulbb"]
     fn arm_smulbb(a: i32, b: i32) -> i32;
 

crates/core_arch/src/arm/ex.rs

@@ -11,7 +11,7 @@
     doc
 ))]
 pub unsafe fn __clrex() {
-    extern "C" {
+    extern "unadjusted" {
         #[link_name = "llvm.arm.clrex"]
         fn clrex();
     }
@@ -27,7 +27,7 @@ pub unsafe fn __clrex() {
     doc
 ))]
 pub unsafe fn __ldrexb(p: *const u8) -> u8 {
-    extern "C" {
+    extern "unadjusted" {
         #[link_name = "llvm.arm.ldrex.p0i8"]
         fn ldrex8(p: *const u8) -> u32;
     }
@@ -43,7 +43,7 @@ pub unsafe fn __ldrexb(p: *const u8) -> u8 {
     doc
 ))]
 pub unsafe fn __ldrexh(p: *const u16) -> u16 {
-    extern "C" {
+    extern "unadjusted" {
         #[link_name = "llvm.arm.ldrex.p0i16"]
         fn ldrex16(p: *const u16) -> u32;
     }
@@ -60,7 +60,7 @@ pub unsafe fn __ldrexh(p: *const u16) -> u16 {
     doc
 ))]
 pub unsafe fn __ldrex(p: *const u32) -> u32 {
-    extern "C" {
+    extern "unadjusted" {
         #[link_name = "llvm.arm.ldrex.p0i32"]
         fn ldrex32(p: *const u32) -> u32;
     }
@@ -78,7 +78,7 @@ pub unsafe fn __ldrex(p: *const u32) -> u32 {
     doc
 ))]
 pub unsafe fn __strexb(value: u32, addr: *mut u8) -> u32 {
-    extern "C" {
+    extern "unadjusted" {
         #[link_name = "llvm.arm.strex.p0i8"]
         fn strex8(value: u32, addr: *mut u8) -> u32;
     }
@@ -97,7 +97,7 @@ pub unsafe fn __strexb(value: u32, addr: *mut u8) -> u32 {
     doc
 ))]
 pub unsafe fn __strexh(value: u16, addr: *mut u16) -> u32 {
-    extern "C" {
+    extern "unadjusted" {
         #[link_name = "llvm.arm.strex.p0i16"]
         fn strex16(value: u32, addr: *mut u16) -> u32;
     }
@@ -116,7 +116,7 @@ pub unsafe fn __strexh(value: u16, addr: *mut u16) -> u32 {
     doc
 ))]
 pub unsafe fn __strex(value: u32, addr: *mut u32) -> u32 {
-    extern "C" {
+    extern "unadjusted" {
         #[link_name = "llvm.arm.strex.p0i32"]
         fn strex32(value: u32, addr: *mut u32) -> u32;
     }

crates/core_arch/src/arm/mod.rs

@@ -107,7 +107,7 @@ pub unsafe fn __dbg<const IMM4: i32>() {
     dbg(IMM4);
 }
 
-extern "C" {
+extern "unadjusted" {
     #[link_name = "llvm.arm.dbg"]
     fn dbg(_: i32);
 }

crates/core_arch/src/arm/neon.rs

@@ -12,7 +12,7 @@ pub(crate) type p8 = u8;
 pub(crate) type p16 = u16;
 
 #[allow(improper_ctypes)]
-extern "C" {
+extern "unadjusted" {
     #[link_name = "llvm.arm.neon.vbsl.v8i8"]
     fn vbsl_s8_(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t;
     #[link_name = "llvm.arm.neon.vbsl.v16i8"]

crates/core_arch/src/arm/simd32.rs

@@ -80,7 +80,7 @@ macro_rules! dsp_call {
     };
 }
 
-extern "C" {
+extern "unadjusted" {
     #[link_name = "llvm.arm.qadd8"]
     fn arm_qadd8(a: i32, b: i32) -> i32;
 

crates/core_arch/src/arm_shared/barrier/mod.rs

@@ -122,7 +122,7 @@ where
     arg.__isb()
 }
 
-extern "C" {
+extern "unadjusted" {
     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.dmb")]
     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.dmb")]
     fn dmb(_: i32);

crates/core_arch/src/arm_shared/crc.rs

@@ -1,4 +1,4 @@
-extern "C" {
+extern "unadjusted" {
     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crc32b")]
     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32b")]
     fn crc32b_(crc: u32, data: u32) -> u32;

crates/core_arch/src/arm_shared/crypto.rs

@@ -1,7 +1,7 @@
 use crate::core_arch::arm_shared::{uint32x4_t, uint8x16_t};
 
 #[allow(improper_ctypes)]
-extern "C" {
+extern "unadjusted" {
     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crypto.aese")]
     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aese")]
     fn vaeseq_u8_(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t;

crates/core_arch/src/arm_shared/hints.rs

@@ -80,7 +80,7 @@ pub unsafe fn __nop() {
     asm!("nop", options(nomem, nostack, preserves_flags));
 }
 
-extern "C" {
+extern "unadjusted" {
     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.hint")]
     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.hint")]
     fn hint(_: i32);