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Handle RISC-V CPU Manufacturer and Brand using uarch in /proc/cpuinfo #904

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RogerHardiman
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In the RISC-V world, CPUs are often designed by companies like SiFive, T-Head and Andes. Use the /proc/cpuinfo 'uarch' values to get the CPU designer and CPU model.

These designs are then licensed to SoC manufacturers who add I/O and GPU features. For example Allwinner (D1) and StarFive (JH7110), and Sophgo (SG2000)

Tested on my VisionFive2 2 RISC-V board

In the RISC-V world, CPUs are often designed by companies like SiFive, T-Head and Andes.
Use the /proc/cpuinfo 'uarch' values to get the CPU designer and CPU model.

These designs are then licensed to SoC manufacturers who add I/O and GPU features.
For example Allwinner (D1) and StarFive (JH7110), and Sophgo (SG2000)
@RogerHardiman
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output of "npm test" on my StarFive VisionFive 2 SBC, which uses the JH7110 SOC which has the SiFive U74 processor inside.
So the result of CPU is a SiFive U74.
In a future commit I'd add the SOC (StarFive) and the SBC (StarFive Vision Five 2) to things like the Baseboard

┌────────────────────────────────────────────────┐
│ CPU v: 5.22.7 │
└────────────────────────────────────────────────┘
{
manufacturer: 'SiFive',
brand: 'u74-mc',
vendor: '',
family: '',
model: '',
stepping: '',
revision: '',
voltage: '',
speed: 1.5,
speedMin: null,
speedMax: null,
governor: 'ondemand',
cores: 4,
physicalCores: 4,
performanceCores: 4,
efficiencyCores: 0,
processors: 1,
socket: '',
flags: '',
virtualization: false,
cache: { l1d: '', l1i: '', l2: '', l3: '' }
}
Time to complete: 668.121ms

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