Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Add LIM node in overlay. #33

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open

Add LIM node in overlay. #33

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 2 additions & 1 deletion targets/arty.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
for the RTL DUT.
"""

from targets.generic import set_boot_hart, set_stdout, set_entry, get_spi_flash, get_spi_region, get_rams, set_rams, set_ram, set_itim
from targets.generic import set_boot_hart, set_stdout, set_entry, get_spi_flash, get_spi_region, get_rams, set_rams, set_ram, set_itim, set_lim

SRAM_SPLIT_MIN_SIZE = 0x10000

Expand Down Expand Up @@ -37,4 +37,5 @@ def generate_overlay(tree, overlay):
set_itim(overlay, ram, 0, size / 2)
return

set_lim(tree, overlay)
set_rams(overlay, ram, itim)
24 changes: 24 additions & 0 deletions targets/generic.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -144,6 +144,30 @@ def set_ecc_scrub(tree, overlay):
ecc_scrub = 0
chosen.properties.append(pydevicetree.Property.from_dts("metal,eccscrub = <%d>;" % \
ecc_scrub))
def set_lim(tree, overlay):
ccache = tree.match("sifive,ccache0")

if ccache:
block_size = ccache[0].get_field("cache-block-size")
sets = ccache[0].get_field("cache-sets")
size = ccache[0].get_field("cache-size") - (sets * block_size)

if len(ccache[0].get_reg()) == 2:
address = ccache[0].get_reg()[1][0]
address_cells = number_to_cells(address, 2)
size_cells = number_to_cells(size, 1)

lim0 = pydevicetree.Node.from_dts("""
%s: lim@%x {
compatible = "sifive,lim";
reg = <%s %s>;
reg-names = "mem";
};
""" % ("lim0", address, address_cells, size_cells))

if lim0 is not None:
ccache[0].add_child(lim0)
overlay.children.append(pydevicetree.Node.from_dts("&%s { %s };" % (ccache[0].label, lim0.to_dts())))

def get_spi_flash(tree):
"""Get the SPI Flash node"""
Expand Down
3 changes: 2 additions & 1 deletion targets/testbench.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
import pydevicetree

from targets.generic import PORTS, CAP_SIZE_FOR_VCS
from targets.generic import number_to_cells, set_boot_hart, set_stdout, set_entry, get_rams, set_rams, set_ecc_scrub
from targets.generic import number_to_cells, set_boot_hart, set_stdout, set_entry, get_rams, set_rams, set_ecc_scrub, set_lim

def get_testram(port, label):
ranges = port.get_ranges()
Expand Down Expand Up @@ -85,6 +85,7 @@ def generate_overlay(tree, overlay):

set_boot_hart(tree, overlay)
set_ecc_scrub(tree, overlay)
set_lim(tree, overlay)

ram, itim = get_rams(tree)

Expand Down
3 changes: 2 additions & 1 deletion targets/vc707.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
for the core on the VC707.
"""

from targets.generic import set_boot_hart, set_stdout, set_entry, get_spi_flash
from targets.generic import set_boot_hart, set_stdout, set_entry, get_spi_flash, set_lim
from targets.generic import get_spi_region, get_rams, set_rams, get_dtim, get_boot_hart

def generate_overlay(tree, overlay):
Expand All @@ -26,4 +26,5 @@ def generate_overlay(tree, overlay):
if dtim is not None:
ram = dtim

set_lim(tree, overlay)
set_rams(overlay, ram, itim)
3 changes: 2 additions & 1 deletion targets/vcu118.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
"""

from targets.generic import set_boot_hart, set_stdout, set_entry, get_spi_flash
from targets.generic import get_spi_region, get_rams, set_rams, get_dtim, get_boot_hart, set_ecc_scrub
from targets.generic import get_spi_region, get_rams, set_rams, get_dtim, get_boot_hart, set_lim

def generate_overlay(tree, overlay):
"""Generate the overlay"""
Expand All @@ -26,4 +26,5 @@ def generate_overlay(tree, overlay):
if dtim is not None:
ram = dtim

set_lim(tree, overlay)
set_rams(overlay, ram, itim)