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Merge pull request #524 from sifive/recfgaddr-svd
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Bump metal for new eccscrub, and cmsis-svd for l2pm + l2pf
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bsousi5 authored Aug 19, 2020
2 parents 1ef7a30 + 1f23c09 commit 5fd0989
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Showing 13 changed files with 6 additions and 84 deletions.
8 changes: 0 additions & 8 deletions bsp/freedom-e310-arty/metal.scratchpad.lds
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Expand Up @@ -72,16 +72,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
PROVIDE( metal_dtim_0_memory_start = 0x80000000 );
PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x4000 );
PROVIDE( metal_itim_0_memory_start = 0x8000000 );
PROVIDE( metal_itim_0_memory_end = 0x8000000 + 0x4000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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8 changes: 0 additions & 8 deletions bsp/qemu-sifive-e31/metal.scratchpad.lds
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Expand Up @@ -71,16 +71,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
/* Default zero-scrub to at most 64KB, for limiting RTL simulation run time. */
/* User is recommended to enable the full size for manual RTL simulation run! */
PROVIDE( metal_dtim_0_memory_start = 0x80000000 );
PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x10000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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8 changes: 0 additions & 8 deletions bsp/qemu-sifive-s51/metal.scratchpad.lds
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Expand Up @@ -71,16 +71,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
/* Default zero-scrub to at most 64KB, for limiting RTL simulation run time. */
/* User is recommended to enable the full size for manual RTL simulation run! */
PROVIDE( metal_dtim_0_memory_start = 0x80000000 );
PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x10000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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8 changes: 0 additions & 8 deletions bsp/qemu-sifive-u54/metal.scratchpad.lds
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Expand Up @@ -70,16 +70,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
/* Default zero-scrub to at most 64KB, for limiting RTL simulation run time. */
/* User is recommended to enable the full size for manual RTL simulation run! */
PROVIDE( metal_memory_0_memory_start = 0x80000000 );
PROVIDE( metal_memory_0_memory_end = 0x80000000 + 0x10000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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8 changes: 0 additions & 8 deletions bsp/qemu-sifive-u54mc/metal.scratchpad.lds
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Expand Up @@ -70,16 +70,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
/* Default zero-scrub to at most 64KB, for limiting RTL simulation run time. */
/* User is recommended to enable the full size for manual RTL simulation run! */
PROVIDE( metal_memory_0_memory_start = 0x80000000 );
PROVIDE( metal_memory_0_memory_end = 0x80000000 + 0x10000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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16 changes: 0 additions & 16 deletions bsp/sifive-hifive-unleashed/metal.scratchpad.lds
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Expand Up @@ -72,24 +72,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
PROVIDE( metal_dtim_0_memory_start = 0x1000000 );
PROVIDE( metal_dtim_0_memory_end = 0x1000000 + 0x2000 );
PROVIDE( metal_itim_0_memory_start = 0x1800000 );
PROVIDE( metal_itim_0_memory_end = 0x1800000 + 0x4000 );
/* Default zero-scrub to at most 64KB, for limiting RTL simulation run time. */
/* User is recommended to enable the full size for manual RTL simulation run! */
PROVIDE( metal_itim_1_memory_start = 0x1808000 );
PROVIDE( metal_itim_1_memory_end = 0x1808000 + 0x10000 );
/* Default zero-scrub to at most 64KB, for limiting RTL simulation run time. */
/* User is recommended to enable the full size for manual RTL simulation run! */
PROVIDE( metal_memory_0_memory_start = 0x80000000 );
PROVIDE( metal_memory_0_memory_end = 0x80000000 + 0x10000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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8 changes: 0 additions & 8 deletions bsp/sifive-hifive1-revb/metal.scratchpad.lds
Original file line number Diff line number Diff line change
Expand Up @@ -72,16 +72,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
PROVIDE( metal_dtim_0_memory_start = 0x80000000 );
PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x4000 );
PROVIDE( metal_itim_0_memory_start = 0x8000000 );
PROVIDE( metal_itim_0_memory_end = 0x8000000 + 0x2000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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6 changes: 0 additions & 6 deletions bsp/sifive-hifive1/metal.scratchpad.lds
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Expand Up @@ -71,14 +71,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
PROVIDE( metal_dtim_0_memory_start = 0x80000000 );
PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x4000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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8 changes: 0 additions & 8 deletions bsp/spike/metal.scratchpad.lds
Original file line number Diff line number Diff line change
Expand Up @@ -70,16 +70,8 @@ SECTIONS
* certain core features */
PROVIDE(__metal_chicken_bit = 1);

/* The memory_ecc_scrub bit is used by _entry code to enable/disable
* memories scrubbing to zero */
PROVIDE(__metal_eccscrub_bit = 0);

/* The RAM memories map for ECC scrubbing */
/* Default zero-scrub to at most 64KB, for limiting RTL simulation run time. */
/* User is recommended to enable the full size for manual RTL simulation run! */
PROVIDE( metal_memory_0_memory_start = 0x80000000 );
PROVIDE( metal_memory_0_memory_end = 0x80000000 + 0x10000 );

/* ROM SECTION
*
* The following sections contain data which lives in read-only memory, if
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2 changes: 1 addition & 1 deletion freedom-metal
2 changes: 1 addition & 1 deletion scripts/cmsis-svd-generator
6 changes: 3 additions & 3 deletions wit-manifest.json
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Expand Up @@ -5,7 +5,7 @@
"source": "git@github.com:sifive/freedom-devicetree-tools.git"
},
{
"commit": "e4104e02156ea85d07b3317081f5bf3bc0ebee93",
"commit": "db8686171e0610e5c8d8455a0b5a5d117532cd14",
"name": "freedom-metal",
"source": "git@github.com:sifive/freedom-metal.git"
},
Expand All @@ -20,12 +20,12 @@
"source": "git@github.com:sifive/devicetree-overlay-generator.git"
},
{
"commit": "6749026ffc33721ed898a06266e43fa4b6ef640b",
"commit": "d9ec971fee8f9af97dac4011d50b45a5c9d31c20",
"name": "ldscript-generator",
"source": "git@github.com:sifive/ldscript-generator.git"
},
{
"commit": "c9936d689d673813581cde883885b8bfca2a2e82",
"commit": "b170b93562cbdc76196bfc51e01135f0e7464fb8",
"name": "cmsis-svd-generator",
"source": "git@github.com:sifive/cmsis-svd-generator.git"
},
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