Wait 100usec before testing FE310 PLL for lock #224
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
keith-packard
suggested changes
Jan 9, 2020
nategraff-sifive
force-pushed
the
pll-lock-race
branch
from
6a7fab6 to
fc8dc9f
Compare
The FE310 PLL needs 100 usec to stabilize before testing the lock signal. This solution assumes that mtime is driven at 32768 Hz for all targets with the FE310 PLL. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
nategraff-sifive
force-pushed
the
pll-lock-race
branch
from
fc8dc9f to
3a896df
Compare
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
The FE310 PLL needs 100 usec to stabilize before testing the lock signal. This solution assumes that mtime is driven at 32768 Hz for all targets with the FE310 PLL.
Should this be backported to v19.08?
Fixes #213