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[Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 #18293
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@bingwang-ms to check |
/azp run Azure.sonic-buildimage |
Commenter does not have sufficient privileges for PR 18293 in repo sonic-net/sonic-buildimage |
For this specific HWSKU, the change looks good to me. For the Dual-ToR topo, the current plan is to use HWSKU Mellanox-SN4700-V64. Are you going to define the topo and buffer template as well? |
…update buffers for t0 Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
…update buffers for t0 (fixes after recalculation) Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
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@yxieca Can you please help merge this PR? Another PR will be raised for HWSKU SN4700-V64 |
…update buffers for t0 (sonic-net#18293) * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 (fixes after recalculation) Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> --------- Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
Cherry-pick PR to 202311: #18396 |
…update buffers for t0 (#18293) * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 (fixes after recalculation) Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> --------- Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
Reminder regarding cherry-pick this PR to 202305 |
@StormLiangMS Can you please cherry-pick for 202305? |
…update buffers for t0 (sonic-net#18293) * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 (fixes after recalculation) Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> --------- Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
Cherry-pick PR to 202305: #19773 |
…update buffers for t0 (#18293) * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 (fixes after recalculation) Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com> --------- Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
Why I did it
Need to provide support for SN4700-O8V48 for Dual-ToR.
DSCP remapping is a part of Dual-ToR feature, so need to update HWSKU files to align with requirements
Work item tracking
How I did it
Use QoS config the same as used in 4600C platform that is already supports Dual-ToR
update buffers for T0
How to verify it
Run DSCP remapping test for Dual-ToR
Which release branch to backport (provide reason below if selected)
Tested branch (Please provide the tested image version)
Description for the changelog
Link to config_db schema for YANG module changes
A picture of a cute animal (not mandatory but encouraged)