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[Mellanox] Add SN5640 SIMX platform with default SKU #20225

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Sep 25, 2024
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Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
{#
Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
Apache-2.0

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
#}
{% set default_cable = '40m' %}
{% set ingress_lossless_pool_size = '57828352' %}
{% set ingress_lossless_pool_xoff = '22544384' %}
{% set egress_lossless_pool_size = '136209408' %}
{% set egress_lossy_pool_size = '57828352' %}

{% import 'buffers_defaults_objects.j2' as defs with context %}

{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
{%- endmacro %}

{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
{%- endmacro %}
Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
{#
Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
Apache-2.0

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
#}
{% set default_cable = '300m' %}
{% set ingress_lossless_pool_size = '40002560' %}
{% set ingress_lossless_pool_xoff = '40370176' %}
{% set egress_lossless_pool_size = '136209408' %}
{% set egress_lossy_pool_size = '40002560' %}

{% import 'buffers_defaults_objects.j2' as defs with context %}

{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
{%- endmacro %}

{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
{%- endmacro %}

{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
{%- endmacro %}
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
{#
Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
Apache-2.0
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
#}
{%- set default_topo = 't0' %}
{%- set dynamic_mode = 'true' %}
{%- include 'buffers_config.j2' %}
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
{
"DEVICE_METADATA": {
"localhost": {
"create_only_config_db_buffers": "true"
}
}
}
202 changes: 202 additions & 0 deletions device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json
Original file line number Diff line number Diff line change
@@ -0,0 +1,202 @@
{
"interfaces": {
"Ethernet0": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet8": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet16": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet24": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet32": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet40": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet48": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet56": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet64": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet72": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet80": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet88": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet96": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet104": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet112": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet120": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet128": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet136": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet144": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet152": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet160": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet168": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet176": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet184": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet192": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet200": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet208": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet216": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet224": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet232": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet240": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet248": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet256": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet264": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet272": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet280": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet288": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet296": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet304": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet312": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet320": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet328": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet336": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet344": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet352": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet360": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet368": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet376": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet384": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet392": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet400": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet408": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet416": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet424": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet432": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet440": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet448": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet456": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet464": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet472": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet480": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet488": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet496": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet504": {
"default_brkout_mode": "8x100G[50G]"
},
"Ethernet512": {
"default_brkout_mode": "1x25G[10G]"
},
"Ethernet520": {
"default_brkout_mode": "1x25G[10G]"
}
}
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
##
## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
## Apache-2.0
##
## Licensed under the Apache License, Version 2.0 (the "License");
## you may not use this file except in compliance with the License.
## You may obtain a copy of the License at
##
## http://www.apache.org/licenses/LICENSE-2.0
##
## Unless required by applicable law or agreed to in writing, software
## distributed under the License is distributed on an "AS IS" BASIS,
## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
## See the License for the specific language governing permissions and
## limitations under the License.
##
# PG lossless profiles.
# speed cable size xon xoff threshold
10000 5m 19456 19456 20480 0
25000 5m 19456 19456 21504 0
50000 5m 19456 19456 26624 0
100000 5m 19456 19456 44032 0
200000 5m 19456 19456 50176 0
400000 5m 19456 19456 86016 0
10000 30m 19456 19456 20480 0
25000 30m 19456 19456 22528 0
50000 30m 19456 19456 27648 0
100000 30m 19456 19456 48128 0
200000 30m 19456 19456 57344 0
400000 30m 19456 19456 99328 0
10000 40m 19456 19456 20480 0
25000 40m 19456 19456 22528 0
50000 40m 19456 19456 28672 0
100000 40m 19456 19456 49152 0
200000 40m 19456 19456 60416 0
400000 40m 19456 19456 104448 0
10000 300m 19456 19456 23552 0
25000 300m 19456 19456 30720 0
50000 300m 19456 19456 46080 0
100000 300m 19456 19456 83968 0
200000 300m 19456 19456 130048 0
400000 300m 19456 19456 243712 0
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