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[YANG] Enhance the port yang model with new port fields: adv_speeds, interface_type and adv_interface_types #6948

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merged 11 commits into from
May 20, 2021
Merged

[YANG] Enhance the port yang model with new port fields: adv_speeds, interface_type and adv_interface_types #6948

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8542063
Add yang model for port auto-neg feature
Junchao-Mellanox Feb 8, 2021
a643311
Add unit test
Junchao-Mellanox Feb 10, 2021
a590759
Add new field to sample config db
Junchao-Mellanox Feb 10, 2021
d7b2129
Optimize yang model definition for port auto negotiation attributes
Junchao-Mellanox Mar 4, 2021
3396cc7
Change autoneg value pattern to on|off
Junchao-Mellanox Mar 5, 2021
0e4157a
Merge branch 'master' into port-auto-neg-yang-model
Junchao-Mellanox Mar 12, 2021
efae6d9
Add description for each new field
Junchao-Mellanox Mar 17, 2021
501f5f1
Merge branch 'master' into port-auto-neg-yang-model
Junchao-Mellanox Apr 2, 2021
2489804
Add description for new fields and adjust unit test
Junchao-Mellanox Apr 2, 2021
3806c7e
Merge branch 'port-auto-neg-yang-model' of github.com:Junchao-Mellano…
Junchao-Mellanox Apr 2, 2021
f4399a5
Fix review comment
Junchao-Mellanox Apr 15, 2021
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38 changes: 38 additions & 0 deletions src/sonic-yang-models/tests/yang_model_tests/tests/port.json
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Expand Up @@ -23,5 +23,43 @@
"desc": "PORT_INVALID_AUTONEG_TEST must condition failure.",
"eStrKey" : "Pattern",
"eStr": ["on|off"]
},
"PORT_VALID_ADVSPEEDS_TEST_1": {
"desc": "PORT_VALID_ADVSPEEDS_TEST_1 no failure."
},
"PORT_VALID_ADVSPEEDS_TEST_2": {
"desc": "PORT_VALID_ADVSPEEDS_TEST_2 no failure."
},
"PORT_INVALID_ADVSPEEDS_TEST_1": {
"desc": "PORT_INVALID_ADVSPEEDS_TEST_1 InvalidValue condition failure.",
"eStrKey" : "InvalidValue",
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"eStr": ["adv_speeds"]
},
"PORT_INVALID_ADVSPEEDS_TEST_2": {
"desc": "PORT_INVALID_ADVSPEEDS_TEST_2 must condition failure.",
"eStrKey" : "Must"
},
"PORT_VALID_TYPE_TEST": {
"desc": "PORT_VALID_TYPE_TEST no failure."
},
"PORT_INVALID_TYPE_TEST": {
"desc": "PORT_INVALID_TYPE_TEST InvalidValue condition failure.",
"eStrKey" : "InvalidValue",
"eStr": ["interface_type"]
},
"PORT_VALID_ADVTYPES_TEST_1": {
"desc": "PORT_VALID_ADVTYPES_TEST_1 no failure."
},
"PORT_VALID_ADVTYPES_TEST_2": {
"desc": "PORT_VALID_ADVTYPES_TEST_2 no failure."
},
"PORT_INVALID_ADVTYPES_TEST_1": {
"desc": "PORT_INVALID_ADVTYPES_TEST_1 InvalidValue condition failure.",
"eStrKey" : "InvalidValue",
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"eStr": ["adv_interface_types"]
},
"PORT_INVALID_ADVTYPES_TEST_2": {
"desc": "PORT_INVALID_ADVTYPES_TEST_2 must condition failure.",
"eStrKey" : "Must"
}
}
170 changes: 170 additions & 0 deletions src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
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Expand Up @@ -83,5 +83,175 @@
]
}
}
},

"PORT_VALID_ADVSPEEDS_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": [25000,40000]
}
]
}
}
},

"PORT_VALID_ADVSPEEDS_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": ["all"]
}
]
}
}
},

"PORT_INVALID_ADVSPEEDS_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": ["invalid"]
}
]
}
}
},

"PORT_INVALID_ADVSPEEDS_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": ["all", "25000"]
}
]
}
}
},

"PORT_VALID_TYPE_TEST": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"interface_type": "CR4"
}
]
}
}
},

"PORT_INVALID_TYPE_TEST": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"interface_type": "Invalid"
}
]
}
}
},

"PORT_VALID_ADVTYPES_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["CR4", "CR"]
}
]
}
}
},

"PORT_VALID_ADVTYPES_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["all"]
}
]
}
}
},

"PORT_INVALID_ADVTYPES_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["Invalid"]
}
]
}
}
},

"PORT_INVALID_ADVTYPES_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["all", "CR4"]
}
]
}
}
}
}
48 changes: 42 additions & 6 deletions src/sonic-yang-models/yang-models/sonic-port.yang
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Expand Up @@ -63,6 +63,48 @@ module sonic-port{
}
}

leaf autoneg {
description "Port auto negotiation mode";

type string {
pattern "on|off";
}
}
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leaf-list adv_speeds {
description "Port advertised speeds, valid value could be a list of interger or all";

type union {
type uint32 {
range 1..400000;
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So there is no other constraint on adv speed?, it can take any number of values. Kindly point to the correct paragraph in HLD for this plz, I will have a look. Thx

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Yes, there is no other constraint for adv_speeds, I am following the field "speed" in the same yang model file. HLD: https://github.com/Junchao-Mellanox/SONiC/blob/port-auto-neg/doc/port_auto_neg/port-auto-negotiation-design.md#config-advertised-speeds

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}
type string {
pattern "all";
}
}
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}

must "(count(adv_speeds[text()='all']) = 0) or (count(adv_speeds) = 1)";

leaf interface_type {
description "Port interface type";

type stypes:interface_type;
}
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leaf-list adv_interface_types {
description "Port advertised interface type, valid value could be a list of stypes:interface_type or all";
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Kindly point to the correct paragraph in HLD here in comment, thanks again

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https://github.com/Junchao-Mellanox/SONiC/blob/port-auto-neg/doc/port_auto_neg/port-auto-negotiation-design.md#config-advertised-interface-types

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I cannot add the HLD paragraph to the comment here because HLD is not approved yet. And HLD approval requires YANG model PR approval.


type union {
type stypes:interface_type;
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type string {
pattern "all";
}
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}
}

must "(count(adv_interface_types[text()='all']) = 0) or (count(adv_interface_types) = 1)";

leaf mtu {
type uint16 {
range 1..9216;
Expand Down Expand Up @@ -90,12 +132,6 @@ module sonic-port{
pattern "on|off";
}
}

leaf autoneg {
type string {
pattern "on|off";
}
}
} /* end of list PORT_LIST */

} /* end of container PORT */
Expand Down
24 changes: 24 additions & 0 deletions src/sonic-yang-models/yang-models/sonic-types.yang
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Expand Up @@ -114,4 +114,28 @@ module sonic-types {
pattern "percentage|used|free|PERCENTAGE|USED|FREE";
}
}

typedef interface_type {
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type enumeration {
enum CR;
enum CR2;
enum CR4;
enum SR;
enum SR2;
enum SR4;
enum LR;
enum LR4;
enum KR;
enum KR4;
enum CAUI;
enum GMII;
enum SFI;
enum XLAUI;
enum KR2;
enum CAUI4;
enum XAUI;
enum XFI;
enum XGMII;
}
}
}