Fixed CSR Instruction Handlers and Use New Register Macros

[kathlenemagnus]

Set of fixes needed to get the rv64mi-p-csr arch test to pass.

• Use new register macros in all instruction handlers
• Set some CSR read-only fields at boot based on the configured XLEN
• Added a way to override CSR register values through a JSON file
• Made several fixes to the CSR instruction handlers
• Improved Instruction Logger to better support exceptions and to print CSR values for CSR instructions

[kathlenemagnus]

@colby-nyce FYI the value here (0xa00000000) is setting the CSR fields that set the XLEN for user mode (uxl) and supervisor mode (sxl). The same value is being written to MSTATUS and SSTATUS in AtlasState::boot.

[kathlenemagnus]

I'm not committed to this method of providing CSR values. Open to suggestions. I've used complex, Sparta parameters in the past, but I've found that they can be hard to read in the yaml file sometimes.

[knute-mips]

Could always create an Action group that are an initialization methods. The first call of run would run theses methods then they "move themselves out of the way" returning to normal operation.

[kathlenemagnus]

Format would be like this:

{
    "mstatus": "0xa00000000",
    "sstatus": "0x200000000"
}

[knute-mips]

Could always create an Action group that are an initialization methods. The first call of run would run theses methods then they "move themselves out of the way" returning to normal operation.

[lzhu-mips]

I am wondering how rd==x0 is taken care of. I believe if rd==x0, no value is written. Is that checked in WRITE_INT_REG?

[kathlenemagnus]

Yes, it is taken care of in the macro. If reg_ident == 0, then the write does not occur.