Skip to content

Commit

Permalink
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
listen CTS
Browse files Browse the repository at this point in the history
burrbull committed Jul 27, 2024

Verified

This commit was signed with the committer’s verified signature. The key has expired.
mmarchini mary marchini
1 parent 19a84c4 commit 618326e
Showing 3 changed files with 19 additions and 2 deletions.
4 changes: 3 additions & 1 deletion CHANGELOG.md
Original file line number Diff line number Diff line change
@@ -9,7 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

### Added

- Serial flow control enable
- Serial flow control enable [#775]
- `i2c_scanner` example [#758]
- Enable `sdio` for stm32f446
- port LTDC implementation and example from stm32f7xx-hal [#731]
@@ -36,6 +36,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
[#758]: https://github.com/stm32-rs/stm32f4xx-hal/pull/758
[#773]: https://github.com/stm32-rs/stm32f4xx-hal/pull/773

[#775]: https://github.com/stm32-rs/stm32f4xx-hal/pull/775

## [v0.21.0] - 2024-05-30

### Changed
2 changes: 2 additions & 0 deletions src/serial.rs
Original file line number Diff line number Diff line change
@@ -111,6 +111,8 @@ pub enum CFlag {
TransmissionComplete = 1 << 6,
/// LIN break detection flag
LinBreak = 1 << 8,
/// Clear to send flag
Cts = 1 << 9,
}

pub mod config;
15 changes: 14 additions & 1 deletion src/serial/uart_impls.rs
Original file line number Diff line number Diff line change
@@ -268,15 +268,22 @@ macro_rules! uartCommon {
pub trait RBFlowControlImpl {
fn enable_rts(&self, state: bool);
fn enable_cts(&self, state: bool);
fn listen_cts(&self, state: bool);
}

impl RBFlowControlImpl for RegisterBlockUsart {
#[inline(always)]
fn enable_rts(&self, state: bool) {
self.cr3().modify(|_, w| w.rtse().bit(state));
}
#[inline(always)]
fn enable_cts(&self, state: bool) {
self.cr3().modify(|_, w| w.ctse().bit(state));
}
#[inline(always)]
fn listen_cts(&self, state: bool) {
self.cr3().modify(|_, w| w.ctsie().bit(state))
}
}

impl RegisterBlockImpl for RegisterBlockUsart {
@@ -545,7 +552,7 @@ where {

impl<UART: Instance + SerialFlowControl, WORD> Serial<UART, WORD>
where
UART::RegisterBlock: RBFlowControlImpl,
UART::RB: RBFlowControlImpl,
{
pub fn with_rts(self, rts: impl Into<UART::Rts>) -> Self {
self.rx.usart.enable_rts(true);
@@ -569,6 +576,12 @@ where
pub fn disable_clear_to_send(&mut self) {
self.tx.usart.enable_cts(false);
}
pub fn listen_clear_to_send(&mut self) {
self.tx.usart.listen_cts(true)
}
pub fn unlisten_clear_to_send(&mut self) {
self.tx.usart.listen_cts(false)
}
}

impl<UART: Instance, WORD> RxISR for Serial<UART, WORD>

0 comments on commit 618326e

Please sign in to comment.