Merge pull request #677 from eZioPan/set_count-for-QEI

`.set_count()` for qei

CHANGELOG.md

@@ -8,8 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ## [Unreleased]
 
 - complete and rework Dma Stream API [#666]
+- add `.set_count()` for QEI, add `.write_count()` for TIM [#677]
 
 [#666]: https://github.com/stm32-rs/stm32f4xx-hal/pull/666
+[#677]: https://github.com/stm32-rs/stm32f4xx-hal/pull/677
 
 ## [v0.17.1] - 2023-07-24
 

src/qei.rs

@@ -70,6 +70,12 @@ impl<TIM: Instance> Qei<TIM> {
     ) {
         (self.tim, self.pins)
     }
+
+    /// Set current count number
+    pub fn set_count(&mut self, value: TIM::Width) -> &mut Self {
+        self.tim.write_count(value);
+        self
+    }
 }
 
 impl<TIM: Instance> embedded_hal::Qei for Qei<TIM> {

src/timer.rs

@@ -273,6 +273,7 @@ mod sealed {
         fn listen_interrupt(&mut self, event: Event, b: bool);
         fn get_interrupt_flag(&self) -> Event;
         fn read_count(&self) -> Self::Width;
+        fn write_count(&mut self, value: Self::Width);
         fn start_one_pulse(&mut self);
         fn start_free(&mut self, update: bool);
         fn cr1_reset(&mut self);
@@ -405,6 +406,12 @@ macro_rules! hal {
                 self.cnt.read().bits() as Self::Width
             }
             #[inline(always)]
+            fn write_count(&mut self, value:Self::Width) {
+                //TODO: remove "unsafe" when possible
+                #[allow(unused_unsafe)]
+                self.cnt.write(|w|unsafe{w.cnt().bits(value)});
+            }
+            #[inline(always)]
             fn start_one_pulse(&mut self) {
                 self.cr1.modify(|_, w| unsafe { w.bits(1 << 3) }.cen().set_bit());
             }