use &Clocks where possible

CHANGELOG.md

@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Added
 
+- `Into<serial::Config>` for `Bps` [#387]
 - `count_down` constructor for `Timer` -> `CountDownTimer` without start [#382]
 - Implementation of RTIC Monotonic for TIM2 & TIM5 under `rtic` feature [#380]
 - `IoPin` for `Output<OpenDrain>> <-> Input<Floating>>` [#374]
@@ -19,6 +20,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
+- [breaking-change] Use `&Clocks` instead of `Clocks` [#387]
 - Split and rename `GetBusFreq` -> `BusClock`, `BusTimerClock` [#386]
 - [breaking-change] Remove `Can::new_unchecked`. Add `Can::tx` and `Can::rx` [#384]
 - [breaking-change] Make `Alternate` generic over `Otype` instead of separate `Alternate` and `AlternateOD` [#383]
@@ -30,6 +32,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#383]: https://github.com/stm32-rs/stm32f4xx-hal/pull/383
 [#384]: https://github.com/stm32-rs/stm32f4xx-hal/pull/384
 [#386]: https://github.com/stm32-rs/stm32f4xx-hal/pull/386
+[#387]: https://github.com/stm32-rs/stm32f4xx-hal/pull/387
 
 ## [v0.10.1] - 2021-10-26
 

examples/analog-stopwatch-with-spi-ssd1306.rs

@@ -103,7 +103,7 @@ fn main() -> ! {
             phase: Phase::CaptureOnFirstTransition,
         },
         2000.khz(),
-        clocks,
+        &clocks,
     );
 
     // Set up the LEDs. On the stm32f429i-disco they are connected to pin PG13 and PG14.

examples/dwt-blinky.rs

@@ -29,7 +29,7 @@ fn main() -> ! {
         let clocks = rcc.cfgr.sysclk(48.mhz()).freeze();
 
         // Create a delay abstraction based on DWT cycle counter
-        let dwt = cp.DWT.constrain(cp.DCB, clocks);
+        let dwt = cp.DWT.constrain(cp.DCB, &clocks);
         let mut delay = dwt.delay();
 
         // Create a stopwatch for maximum 9 laps

examples/i2s-audio-out-dma.rs

@@ -113,7 +113,7 @@ fn main() -> ! {
             gpiob.pb9.into_alternate_open_drain(),
         ),
         100.khz(),
-        clocks,
+        &clocks,
     );
     // Shift the address to deal with different ways of representing I2C addresses
     let mut dac = Cs43L22::new(i2c, 0x94 >> 1);
@@ -127,7 +127,7 @@ fn main() -> ! {
         gpioc.pc7.into_alternate(),
         gpioc.pc12.into_alternate(),
     );
-    let hal_i2s = I2s::new(dp.SPI3, i2s_pins, clocks);
+    let hal_i2s = I2s::new(dp.SPI3, i2s_pins, &clocks);
     let i2s_clock = hal_i2s.input_clock();
 
     // Audio timing configuration:

examples/i2s-audio-out.rs

@@ -109,7 +109,7 @@ fn main() -> ! {
             gpiob.pb9.into_alternate_open_drain(),
         ),
         100.khz(),
-        clocks,
+        &clocks,
     );
     // Shift the address to deal with different ways of representing I2C addresses
     let mut dac = Cs43L22::new(i2c, 0x94 >> 1);
@@ -123,7 +123,7 @@ fn main() -> ! {
         gpioc.pc7.into_alternate(),
         gpioc.pc12.into_alternate(),
     );
-    let hal_i2s = I2s::new(dp.SPI3, i2s_pins, clocks);
+    let hal_i2s = I2s::new(dp.SPI3, i2s_pins, &clocks);
     let i2s_clock = hal_i2s.input_clock();
 
     // Audio timing configuration:

examples/ist7920_bidi_normal_spi.rs

@@ -45,7 +45,7 @@ fn main() -> ! {
 
     // Change spi transfer mode to Bidi for more efficient operations.
     let spi =
-        Spi::new(dp.SPI1, (sck, miso, mosi), mode, 8_000_000.hz(), clocks).to_bidi_transfer_mode();
+        Spi::new(dp.SPI1, (sck, miso, mosi), mode, 8_000_000.hz(), &clocks).to_bidi_transfer_mode();
 
     let iface = SPIInterface::new(spi, dc, cs);
 

examples/rng-display.rs

@@ -73,7 +73,7 @@ fn main() -> ! {
         let gpiob = dp.GPIOB.split();
         let scl = gpiob.pb8.into_alternate().set_open_drain();
         let sda = gpiob.pb9.into_alternate().set_open_drain();
-        let i2c = I2c::new(dp.I2C1, (scl, sda), 400.khz(), clocks);
+        let i2c = I2c::new(dp.I2C1, (scl, sda), 400.khz(), &clocks);
 
         // Set up the display
         let interface = I2CDisplayInterface::new(i2c);
@@ -83,7 +83,7 @@ fn main() -> ! {
 
         // enable the RNG peripheral and its clock
         // this will panic if the clock configuration is unsuitable
-        let mut rand_source = dp.RNG.constrain(clocks);
+        let mut rand_source = dp.RNG.constrain(&clocks);
         let mut format_buf = String::<20>::new();
         loop {
             //display clear

examples/sd.rs

@@ -40,7 +40,7 @@ fn main() -> ! {
     let d3 = gpioc.pc11.into_alternate().internal_pull_up(true);
     let clk = gpioc.pc12.into_alternate().internal_pull_up(false);
     let cmd = gpiod.pd2.into_alternate().internal_pull_up(true);
-    let mut sdio = Sdio::new(device.SDIO, (clk, cmd, d0, d1, d2, d3), clocks);
+    let mut sdio = Sdio::new(device.SDIO, (clk, cmd, d0, d1, d2, d3), &clocks);
 
     hprintln!("Waiting for card...").ok();
 

examples/serial-9bit.rs

@@ -66,7 +66,7 @@ fn main() -> ! {
         dp.USART2,
         (tx_pin, rx_pin),
         Config::default().baudrate(9600.bps()).wordlength_9(),
-        clocks,
+        &clocks,
     )
     .unwrap()
     // Make this Serial object use u16s instead of u8s

examples/serial.rs

@@ -6,7 +6,7 @@ use panic_halt as _;
 use cortex_m_rt::entry;
 use stm32f4xx_hal as hal;
 
-use crate::hal::{pac, prelude::*, serial::config::Config, serial::Serial};
+use crate::hal::{pac, prelude::*, serial::Serial};
 
 use core::fmt::Write; // for pretty formatting of the serial output
 
@@ -27,13 +27,7 @@ fn main() -> ! {
     let tx_pin = gpioa.pa2.into_alternate();
 
     // configure serial
-    let mut tx = Serial::tx(
-        dp.USART2,
-        tx_pin,
-        Config::default().baudrate(9600.bps()),
-        clocks,
-    )
-    .unwrap();
+    let mut tx = Serial::tx(dp.USART2, tx_pin, 9600.bps(), &clocks).unwrap();
 
     let mut value: u8 = 0;
 

examples/spi_dma.rs

@@ -52,7 +52,7 @@ fn main() -> ! {
             (pb13, NoMiso {}, pb15),
             mode,
             3_000_000.hz(),
-            clocks,
+            &clocks,
         );
 
         let buffer = cortex_m::singleton!(: [u8; ARRAY_SIZE] = [1; ARRAY_SIZE]).unwrap();

examples/ssd1306-image.rs

@@ -46,7 +46,7 @@ fn main() -> ! {
             .into_alternate()
             .internal_pull_up(true)
             .set_open_drain();
-        let i2c = I2c::new(dp.I2C1, (scl, sda), 400.khz(), clocks);
+        let i2c = I2c::new(dp.I2C1, (scl, sda), 400.khz(), &clocks);
 
         // There's a button on PC13. On the Nucleo board, it's pulled up by a 4.7kOhm resistor
         // and therefore is active LOW. There's even a 100nF capacitor for debouncing - nice for us

examples/stopwatch-with-ssd1306-and-interrupts.rs

@@ -74,7 +74,7 @@ fn main() -> ! {
                 gpiob.pb9.into_alternate().set_open_drain(),
             ),
             400.khz(),
-            clocks,
+            &clocks,
         );
 
         let mut syscfg = dp.SYSCFG.constrain();

examples/ws2812_spi.rs

@@ -27,7 +27,7 @@ fn main() -> ! {
         (gpioa.pa5, NoPin, gpioa.pa7),
         ws2812::MODE,
         3500.khz(),
-        clocks,
+        &clocks,
     );
 
     let mut ws = ws2812::Ws2812::new(spi);

src/dwt.rs

@@ -6,17 +6,17 @@ use cortex_m::peripheral::{DCB, DWT};
 use embedded_hal::blocking::delay::{DelayMs, DelayUs};
 
 pub trait DwtExt {
-    fn constrain(self, dcb: DCB, clocks: Clocks) -> Dwt;
+    fn constrain(self, dcb: DCB, clocks: &Clocks) -> Dwt;
 }
 impl DwtExt for DWT {
     /// Enable trace unit and cycle counter
-    fn constrain(mut self, mut dcb: DCB, clocks: Clocks) -> Dwt {
+    fn constrain(mut self, mut dcb: DCB, clocks: &Clocks) -> Dwt {
         dcb.enable_trace();
         self.enable_cycle_counter();
         Dwt {
             dwt: self,
             dcb,
-            clocks,
+            clock: clocks.hclk(),
         }
     }
 }
@@ -25,7 +25,7 @@ impl DwtExt for DWT {
 pub struct Dwt {
     dwt: DWT,
     dcb: DCB,
-    clocks: Clocks,
+    clock: Hertz,
 }
 impl Dwt {
     /// Release the dwt and dcb control
@@ -36,15 +36,13 @@ impl Dwt {
     }
     /// Create a delay instance
     pub fn delay(&self) -> Delay {
-        Delay {
-            clock: self.clocks.hclk(),
-        }
+        Delay { clock: self.clock }
     }
     /// Create a stopwatch instance
     /// # Arguments
     /// * `times` - Array which will be holding the timings in ticks (max laps == times.len()-1)
     pub fn stopwatch<'i>(&self, times: &'i mut [u32]) -> StopWatch<'i> {
-        StopWatch::new(times, self.clocks.hclk())
+        StopWatch::new(times, self.clock)
     }
     /// Measure cycles it takes to execute closure `f`.
     ///

src/i2c.rs

@@ -285,7 +285,7 @@ where
     SCL: PinScl<I2C, A = Const<SCLA>> + SetAlternate<OpenDrain, SCLA>,
     SDA: PinSda<I2C, A = Const<SDAA>> + SetAlternate<OpenDrain, SDAA>,
 {
-    pub fn new<M: Into<Mode>>(i2c: I2C, mut pins: (SCL, SDA), mode: M, clocks: Clocks) -> Self {
+    pub fn new<M: Into<Mode>>(i2c: I2C, mut pins: (SCL, SDA), mode: M, clocks: &Clocks) -> Self {
         unsafe {
             // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
             let rcc = &(*RCC::ptr());

src/i2s.rs

@@ -309,8 +309,8 @@ where
     ///
     /// This function panics if the I2S clock input (from the I2S PLL or similar)
     /// is not configured.
-    pub fn new(spi: SPI, mut pins: (WS, CK, MCLK, SD), clocks: Clocks) -> Self {
-        let input_clock = SPI::i2s_freq(&clocks);
+    pub fn new(spi: SPI, mut pins: (WS, CK, MCLK, SD), clocks: &Clocks) -> Self {
+        let input_clock = SPI::i2s_freq(clocks);
         unsafe {
             // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
             let rcc = &(*RCC::ptr());

src/rng.rs

@@ -77,11 +77,11 @@ pub trait RngExt {
     /// # Panics
     ///
     /// This function will panic if `PLL48_CLK < 1/16 HCLK`.
-    fn constrain(self, clocks: Clocks) -> Rng;
+    fn constrain(self, clocks: &Clocks) -> Rng;
 }
 
 impl RngExt for RNG {
-    fn constrain(self, clocks: Clocks) -> Rng {
+    fn constrain(self, clocks: &Clocks) -> Rng {
         let rcc = unsafe { &*pac::RCC::ptr() };
 
         cortex_m::interrupt::free(|_| {

src/sdio.rs

@@ -1,9 +1,17 @@
 //! Sdio host
 
-#[allow(unused_imports)]
-use crate::gpio::{gpioa::*, gpiob::*, gpioc::*, gpiod::*, Alternate, PushPull};
+#[cfg(any(
+    feature = "stm32f411",
+    feature = "stm32f412",
+    feature = "stm32f413",
+    feature = "stm32f423"
+))]
+use crate::gpio::{gpioa::*, gpiob::*};
+use crate::gpio::{gpioc::*, gpiod::*, Alternate, PushPull};
 use crate::pac::{self, RCC, SDIO};
 use crate::rcc::{Clocks, Enable, Reset};
+#[allow(unused_imports)]
+use crate::time::Hertz;
 pub use sdio_host::{
     cmd, cmd::ResponseLen, CardCapacity, CardStatus, Cmd, CurrentState, SDStatus, CIC, CID, CSD,
     OCR, RCA, SCR,
@@ -149,7 +157,7 @@ pub struct Sdio {
     sdio: SDIO,
     bw: Buswidth,
     card: Option<Card>,
-    clocks: Clocks,
+    clock: Hertz,
 }
 
 /// Sd card
@@ -164,7 +172,7 @@ pub struct Card {
 
 impl Sdio {
     /// Create and enable the Sdio device
-    pub fn new<PINS: Pins>(sdio: SDIO, _pins: PINS, clocks: Clocks) -> Self {
+    pub fn new<PINS: Pins>(sdio: SDIO, _pins: PINS, clocks: &Clocks) -> Self {
         unsafe {
             //NOTE(unsafe) this reference will only be used for atomic writes with no side effects
             let rcc = &*RCC::ptr();
@@ -195,7 +203,7 @@ impl Sdio {
             sdio,
             bw: PINS::BUSWIDTH,
             card: None,
-            clocks,
+            clock: clocks.sysclk(),
         };
 
         // Make sure card is powered off
@@ -308,7 +316,7 @@ impl Sdio {
         });
 
         // Wait for 2 ms after changing power settings
-        cortex_m::asm::delay(2 * (self.clocks.sysclk().0 / 1000));
+        cortex_m::asm::delay(2 * (self.clock.0 / 1000));
     }
 
     /// Get a reference to the initialized card

src/serial.rs

@@ -180,6 +180,15 @@ pub mod config {
             }
         }
     }
+
+    impl<T: Into<Bps>> From<T> for Config {
+        fn from(b: T) -> Config {
+            Config {
+                baudrate: b.into(),
+                ..Default::default()
+            }
+        }
+    }
 }
 
 pub trait Pins<USART> {}
@@ -681,11 +690,12 @@ where
     pub fn new(
         usart: USART,
         mut pins: (TX, RX),
-        config: config::Config,
-        clocks: Clocks,
+        config: impl Into<config::Config>,
+        clocks: &Clocks,
     ) -> Result<Self, config::InvalidConfig> {
         use self::config::*;
 
+        let config = config.into();
         unsafe {
             // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
             let rcc = &(*RCC::ptr());
@@ -695,7 +705,7 @@ where
             USART::reset(rcc);
         }
 
-        let pclk_freq = USART::clock(&clocks).0;
+        let pclk_freq = USART::clock(clocks).0;
         let baud = config.baudrate.0;
 
         // The frequency to calculate USARTDIV is this:
@@ -815,8 +825,8 @@ where
     pub fn tx(
         usart: USART,
         tx_pin: TX,
-        config: config::Config,
-        clocks: Clocks,
+        config: impl Into<config::Config>,
+        clocks: &Clocks,
     ) -> Result<Tx<USART, WORD>, config::InvalidConfig> {
         Self::new(usart, (tx_pin, NoPin), config, clocks).map(|s| s.split().0)
     }
@@ -830,8 +840,8 @@ where
     pub fn rx(
         usart: USART,
         rx_pin: RX,
-        config: config::Config,
-        clocks: Clocks,
+        config: impl Into<config::Config>,
+        clocks: &Clocks,
     ) -> Result<Rx<USART, WORD>, config::InvalidConfig> {
         Self::new(usart, (NoPin, rx_pin), config, clocks).map(|s| s.split().1)
     }